Prashant Saxena work email
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20+ years of experience leading senior engineering teams and successfully delivering a diverse range of high-performance ASIC and memory products. From the initial concept to full-scale production, I have actively contributed to every stage of the development process, encompassing product definition, customer validation, architecture, floorplan, design, verification, silicon debug, and yield improvement.As a hands-on leader, I possess a broad technical proficiency across various domains. My expertise spans programmable microcontrollers, volatile and non-volatile memories, general-purpose low power IO designs, ultra low-power and high-performance chip architectures, ESD circuits, CMOS digital and analog circuits (voltage regulators, POR, and SAR ADCs). Additionally, I have experience working with AC-DC power conversion systems based on the different topologies, such as flyback, LCC/LLC, and AHB flyback.Throughout my career, I have consistently demonstrated my ability to combine leadership skills with technical knowledge, resulting in successful outcomes. I have led global, cross-functional teams of up to 50 professionals, including design, product, test, and packaging experts.
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Senior DirectorOnsemi Sep 2023 - PresentScottsdale, Arizona, Us -
Sr. Director Ic DevelopmentNexgen Power Systems Jul 2021 - Sep 2023Santa Clara, Ca, UsSpearheaded the development and deployment of the first-generation LED driver system, leveraging the latest NexGen vertical GaN technology. Responsible for architecting definition of LED microcontroller, system/firmware implementation and backend system testing. Defined a scalable system architecture platform encompassing power densities ranging from 20W to 140W, employing optimized gate driver circuits tailored specifically for vertical GaN technology.* Industry’s first LED microcontroller flyback architecture which can achieve 1% dimming at 1Mhz switching frequency across universal voltage range.* Established system and test development teams in India and Australia* Passed all pre-certification compliance and regulatory requirements (surge, conducted & radiated EMI, ESD etc.)* Achieved >5W/in3 power density for a 20W LED driver system. -
Director Of EngineeringInfineon Technologies Feb 2020 - May 2021Neubiberg, München, DeLed the architecture and design development of In-Memory-Compute (IMC) SOC specifically tailored for AI hardware accelerators. Successfully managed and completed the tape-out of the first prototype silicon in this product family to demonstrate the inference capability.*Developed a novel and compact data path architecture specifically for the IMC (In-Memory-Compute) SOC to achieve 8bit accuracy.*Successfully achieved first pass silicon by demonstrating near digital inference accuracy on 3 layers CNN network using MNIST database*Developed innovative multi-bit programming algorithm for programming 128 states in a flash array -
Sr. Principal Design EngineerCypress Semiconductor Corporation Aug 2016 - Feb 2020San Jose, Ca, UsStrategic product ideation and chip development to capture high revenue SRAM business and retain market leadership (#1). Managed design and development process of embedded non-volatile flash macros. -
Principal Design EngineerCypress Semiconductor Corporation Feb 2012 - Aug 2016San Jose, Ca, UsSpearheaded the product line architecture and successfully managed chip/IP development process and customer support for low power and high-speed SRAM with ECC (65nm). From the initial conception to full deployment, seamless progression of the SRAM product was ensured, demonstrating strong leadership throughout. Served as the primary point of contact for resolving customer FA cases and identifying new opportunities for memory products. -
Design Group LeadCypress Semiconductor Corporation Aug 2007 - Feb 2012San Jose, Ca, UsAs a program manager, successfully led the design of a 90nm 32M/64M asynchronous fast SRAM utilizing a stack die solution. Managed teams from cross-functional roles like FAB, assembly, packaging, backend testing, quality, design, and product engineering. Took charge as the IP lead for 10-bit SAR ADC IP blocks, overseeing all technical aspects, including post-Si IP characterization and seamless integration at the top level within a programmable SoC. -
Staff Design Engineer, Senior Design And Staff EngineerCypress Semiconductor Corporation Aug 2002 - Aug 2007San Jose, Ca, UsI began my career as a design engineer and worked my way up to become the tech/IP lead for all 90nm/130nm SRAM product development. During this period, I worked on many IP developments ranging from POR, IO, and both low and high-power voltage regulators. Worked extensively in pre & post Si activities.
Prashant Saxena Skills
Prashant Saxena Education Details
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Indian Institute Of Management BangaloreExecutive Mba -
Indian Institute Of Science (Iisc)Solid State Physics -
M.M.M.Engg College GorakhpurElectronics -
Jnu
Frequently Asked Questions about Prashant Saxena
What company does Prashant Saxena work for?
Prashant Saxena works for Onsemi
What is Prashant Saxena's role at the current company?
Prashant Saxena's current role is Sr. Director IC Design at ONSEMI.
What is Prashant Saxena's email address?
Prashant Saxena's email address is pr****@****ess.com
What schools did Prashant Saxena attend?
Prashant Saxena attended Indian Institute Of Management Bangalore, Indian Institute Of Science (Iisc), M.m.m.engg College Gorakhpur, Jnu.
What skills is Prashant Saxena known for?
Prashant Saxena has skills like Design, Trading, Science, Sram, Electrical Design, Engineering.
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