Adrià Armejach Sanosa Email & Phone Number

I worked on a number of EU projects:* AXLE project - https://axleproject.eu - My tasks included exploring how the use of emerging memory technologies and 3D stacking will affect the design and performance of DBMSs.* Mont-Blanc 3 project - http://montblanc-project.eu - I worked on simulation infrastructures that target large-scale systems, architecting heterogeneous processors with "big" and "little" cores, and vector ISAs (with a focus on Arm SVE).*Mont-Blanc 2020 project - http://montblanc-project.eu - The project is set to provide RTL of several SoC components that will be tested in a large FPGA-based demonstrator. I am leading the definition of application requirements for a new SoC that targets the HPC market, and the simulation infrastructure to model microarchitectural details of the architecture.

Working on Transactional Memory.

Carrying out my master's thesis.

Barcelona Area, Spain

Teaching in the Bachelor Degree of Informatics Engineering: Computer Organization, Operating Systems.

Developing tools.

Developing and maintaining banking software deployed in production systems at national scale in prestigious banks. Using MySQL, Cobol, Java and C++.During the last months, in charge of some of the projects.

Doctor Of Philosophy (Ph.D.), Computer Architecture, Cum Laude

My research focused on improving the performance and energy-efficiency of architectural support for parallel programming, specifically.

Exchange Student, Computer Engineering

Compilers, embedded systems, and performance evaluation techniques.

Master'S Degree, Computer Engineering, Computer Architecture

Parallel Architectures, Transactional Memory

Licentiate, Computer Science