Responsible for leading and growing the Silicon Implementation Group (formerly COT Organization), hiring engineers, and redefining the organization's structures to bolster workflows.A select number of my organization's accomplishments:• Our team developed a modern foundry agnostic design flow, enabling the swap of EDA tools to utilize new capabilities and improve our commercials and support.• By working with the Sourcing Organization to change how we purchased EDA tools, we facilitated significant savings for Ericsson and more flexible tool usage.• Drove a new Test/Debug Architecture Alignment strategy to improve the end-to-end silicon.• Improved project execution by developing a PPA dashboard and Convergence Trend dashboard to measure design progress and better extrapolate completion dates.• Improved cost by adjusting our hiring, re-negotiating our EDA contracts, and auditing Ericsson's cost assumptions for the SIG organization.• We introduced new features to our ASIC to reduce power by 25-35%, including Adaptive Voltage Scaling (AVS), multi-voltage islands, RTL feasibility, SLM sensors, and low-power design recipes.• Launched a new capability to reduce thermal hotspots through design techniques by several degrees.• Developing an ASIC machine in Ericsson, which required developing ways of working with import/export control, trade compliance, supply chain, and legal.

Established the COT Organization, recruiting and employing the core leadership team across engineering disciplines. Built and maintained Ericsson Radio ASICs for the company. Several accomplishments include:• Served as the point person for collaboration with radio project leaders for COT to work on its first ASIC.• Collaborated with core leadership team to develop new organizational processes, design flows, best practices, and ways of working with other Ericsson organizations.

Oversaw the Design Implementation (DI) Organization, managing the physical implementation of GPUs and System IPs utilized in Samsung Galaxy phones. Developed design infrastructure and implementation techniques to drive down power and reduce implementation schedule duration.Some of my organization's accomplishments include:• Built 38% more projects within the first year, growing overall cell instances by +50% with only a 12% increase in headcount through developing PPA Convergence Dashboards, optimizing our design flows, strategically reshuffling resources, and minimizing organizational bottlenecks.• Reduced the financial footprint through various techniques, including developing a dual EDA flow.• Launched a GPU Design Implementation group in Bangalore to build GPU derivatives, which improved the financial cost structure.• Played a key role alongside SARC/ACL and AMD in designing and implementing a mobile 4nm GPU targeted for future Galaxy phones.• Implementation techniques improved GPU power efficiency by 15-20%.

Managed the CPU Physical Implementation Organization, initially hardening ARM CPUs but eventually designing custom CPUs. Crafted new design techniques for maximizing performance and minimizing power.Several notable accomplishments include:• Implemented structure custom techniques like early RTL feasibility, low-power clock mesh, and structured data path, developing custom recipes to push PPA.• Improved PPA by an additional ~20% through launching a unique collaboration model with EDA R&D organizations and utilizing custom implementation techniques.• Managed the IT Department for one year, focusing on addressing organizational challenges while driving process improvement initiatives to support our engineers better.

Intel division purchased by Marvell in November 2006.Migrated Intel ASICs to TSMC, making them more profitable.

Built a new organization and enabled Dynamic Voltage Frequency Scaling capability for the first time.

Converted MC6800 custom CPUs to synthesizable cores porting to different process nodes running at a much higher frequency.

Developed memory compilers for ST for the first time.

Worked on the HARM missile guidance system ASIC.