Aaron Kuo Email & Phone Number

Santa Clara, California, United States

Pittsburgh, Pennsylvania, United States

Advanced Chip Test Lab @ CMUAdvisor: Dr. Shawn Blanton

Durham, North Carolina, United States

• Implemented radiation-tolerant IC design techniques to reduce both single event effect and total ionizing dose susceptibility.
• Minimized SNR drop to within 3dB of baseline up-converter mixer performance within Cadence Spectre simulations.

Santa Clara, California, United States

• PoE Modular Switch Platform 56-Gigabit Testcard:
• Designed circuit schematic and PCB stackup for a testcard to validate functionality of downstream ASICs and CPUs.
• Validated electrical characteristics of new parts library components such as VRMs, ECBs, and microprocessors planned for use in both testcards and production products.112-Gigabit Switch Fabric Feasibility Study:
• Tested feasibility of older 56-gigabit PCB design principles for higher bandwidth signaling standards such as PAM4.
• Debugged VRM power delivery, JTAG interface connectivity, and clock jitter issues using an oscilloscope to probe relevant signal layers and power rails.Meta OpenCompute Product Validation and Support:
• Managed testing program and provided hardware debug support for pluggable BMCs and power entry modules (PEM).

Los Angeles, California, United States

• RoMeLa @ UCLA:
• Developed a new low-cost, ML-based autonomous racing project centered around the creation of an accessible learning platform based on the Raspberry Pi.
• Designed a curriculum meant to help students of all disciplines gain a top-level understanding of relevant project concepts such as machine learning, neural networks, and hardware design.
• Advisor: Dr. Dennis Hong

Santa Clara, California, United States

• Modular Switch Platform Sensor Tester:
• Addressed an overseas assembly line validation inefficiency by designing an automated testing apparatus circuit.
• Improved estimated assembly time by 20% by removing the need to access and probe every test point on PCBs.
• Interfaced with mechanical and product engineering teams to verify design constraints, component footprint compatibility, and tester ease of use.Current Mode Converter Characterization:
• Characterized performance of a new VRM meant to replace older components with high supply-chain risk in terms of overshoot, ripple, and switching jitter for typical application voltages and current loads using an.
• Modified components onboard the supplied Maxim Devices evaluation board (MAX20810) to achieve the target output voltages with load drawn using a benchtop DC E-Load.

Los Angeles, California, United States

• Led online course lab sessions to assist Professor Briggs in teaching students fundamental circuit rules, lab equipment usage, feedback control, sensor fusion, and C++ coding.
• Debugged code and hardware for two lab sections of 28 students for completing an autonomous line-following robot on the TI-RSLK MAX Platform course capstone project, with a 100% completion success rate.

Las Vegas, Nevada, United States

• Conducted hardware/software verification for lighting system testing.
• Communicated with overseas team for resolving discovered hardware and software bugs.
• Aided in writing technical documentation for products in development.

Hsinchu County/City, Taiwan

- Gained analog and digital VLSI layout and design training.- Received SRAM architecture and theory instruction- Utilized Synopsys Laker and Cadence Virtuoso software suites

Master Of Science - Ms, Electrical And Computer Engineering

Activities and Societies: CMU Advanced Chip Test Lab (ACTL)

Bachelor Of Science - Bs, Electrical And Computer Engineering

Activities and Societies: IEEE Research and Development Lead IEEE Aircopter Project Lead ACA, KASA, CRU