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Aaron Ng Email & Phone Number

Director, Machine Learning Inference at AMD
Location: San Jose, California, United States 10 work roles 1 school
1 work email found @xilinx.com LinkedIn matched
✓ Verified Jul 2026 4 data sources Profile completeness 100%

Contact Signals · 1 work email

Work email a****@xilinx.com
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Current company
AMD
Role
Director, Machine Learning Inference
Location
San Jose, California, United States
Company size

Who is Aaron Ng? Overview

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Quick answer

Aaron Ng is listed as Director, Machine Learning Inference at AMD, a with 44382 employees, based in San Jose, California, United States. AeroLeads shows a work email signal at xilinx.com and a matched LinkedIn profile for Aaron Ng.

Aaron Ng previously worked as Software Suite for FPGA Deep Learning processors at Xilinx and FPGA Machine Learning Acceleration at Xilinx. Aaron Ng holds Masters, Computer Science And Engineering from University Of Michigan.

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{first}.{last}@xilinx.com
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AeroLeads found 1 current-domain work email signal for Aaron Ng. Compare company email patterns before reaching out.

Profile bio

About Aaron Ng

Aaron Ng is a Director, Machine Learning Inference at AMD. He possess expertise in fpga, c++, computer architecture, eda, software engineering and 13 more skills.

Listed skills include Fpga, C++, Computer Architecture, Eda, and 14 others.

Current workplace

Aaron Ng's current company

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AMD
Amd
Director, Machine Learning Inference
San Jose, CA, US
Website
Employees
44382
AeroLeads page
10 roles · 24 years

Aaron Ng work experience

A career timeline built from the work history available for this profile.

Director, Machine Learning Inference

Amd

San Jose, Ca, Us

Role listed

Amd

San Jose, Ca, Us

Director, Machine Learning Inference

Amd

Santa Clara, California, Us

Ryzen AI

Software Suite For Fpga Deep Learning Processors

San Jose, Ca, Us

Software for Deep Learning processors+ Execution engine & runtime+ Deep Learning Processing unit (DPU) controllers+ Inference server+ C++/Python user API

Jan 2018 - Mar 2022

Fpga Machine Learning Acceleration

San Jose, Ca, Us

Launched FPGA machine learning solutions to the cloud+ http://xilinx.com/ml (try our Deep Learning AMI on AWS! - https://aws.amazon.com/marketplace/pp/B077FM2JNS)+ First C++/Python FPGA BLAS, DNN and ML libraries that bridge ML apps and FPGA accelerators+ FPGA ML REST engine

2016 - 2017 ~1 yr

Eda Physical Synthesis & Logic Optimization

San Jose, Ca, Us

Made algorithms to improve a circuit's area, timing or power+ Auto pipeline analyzer: reports max achievable performance of a design via pipelining, as well as where to insert pipeline registers to achieve it. Also has secret mode to automatically pipeline the design. US patent 9,836,568.+ Neural network Physical Synthesis oracle. First, compiled a database of all Physical Synthesis optimizations. I.e., the design features before a move and the timing improvement after a move. Then trained a neural network to predict the timing improvement of a move. This unlocked two new Physical Synthesis modes: 2x faster while sacrificing 1% QOR by skipping unrewarding moves, or 1% extra QOR by spending more time only on rewarding moves. US patent 10,192,016.

2012 - 2015 ~3 yrs

Eda Visualization & Analysis Tools

San Jose, Ca, Us

+ "FlowViz" QOR GUI: X-ray vision into each step of the EDA tool flow (Logic Optimization, Placement, Physical Synthesis and Routing). Works as an interactive "QOR time machine" that helps designers and developers step forward and backward to pinpoint the root of QOR problems or algorithm bugs. The UI renders the design's physical snapshot for each phase using d3js, alongside interactive timing reports. U.S. patent 10,366,201.+ "DesignSelect": engine to launch tests from a big database of regression tests. Trained a scikit-learn classifier to suggest tests to run based on a user's list of modified files. + Memory profile analyzer: web app takes weekly memory profile dumps and draws a user-friendly UI to isolate memory hogs.

2012 - 2015 ~3 yrs

Eda Placement

San Jose, Ca, Us

Placed bigger and faster circuits into bigger and faster FPGAs with increasingly funny features. And as we like to do things in EDA, the code must give better QoR, run faster and use less memory.

2006 - 2011 ~5 yrs

Software Engineer Intern

Wilsonville, Or, Us

Upgraded the Placer to handle mixed-size designs via combined floorplanning and partitioning.

May 2005 - Aug 2005

Graduate Student Research Assistant

Ann Arbor, Michigan, Us

Advanced Computer Architecture Lab

2003 - 2005 ~2 yrs
Team & coworkers

Colleagues at AMD

Other employees you can reach at amd.com. View company contacts for 44382 employees →

1 education record

Aaron Ng education

  • University Of Michigan
    University Of Michigan
    Computer Science And Engineering
FAQ

Frequently asked questions about Aaron Ng

Quick answers generated from the profile data available on this page.

What company does Aaron Ng work for?

Aaron Ng works for AMD.

What is Aaron Ng's role at AMD?

Aaron Ng is listed as Director, Machine Learning Inference at AMD.

What is Aaron Ng's email address?

AeroLeads has found 1 work email signal at @xilinx.com for Aaron Ng at AMD.

Where is Aaron Ng based?

Aaron Ng is based in San Jose, California, United States while working with AMD.

What companies has Aaron Ng worked for?

Aaron Ng has worked for Amd, Xilinx, Calypto Design Systems, and The University Of Michigan.

Who are Aaron Ng's colleagues at AMD?

Aaron Ng's colleagues at AMD include Lindo Kuhle, Srinivasarao Amati, Amar Solanki, Ismail Olalere, and Minh Nhật Nguyễn.

How can I contact Aaron Ng?

You can use AeroLeads to view verified contact signals for Aaron Ng at AMD, including work email, phone, and LinkedIn data when available.

What schools did Aaron Ng attend?

Aaron Ng holds Masters, Computer Science And Engineering from University Of Michigan.

What skills is Aaron Ng known for?

Aaron Ng is listed with skills including Fpga, C++, Computer Architecture, Eda, Software Engineering, Field Programmable Gate Arrays, Semiconductors, and Perl.

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