Aaron Yong Yew Yeap Email and Phone Number
Staff physical design engineer with 10 years of experience in Physical Design and EDA CAD (design automation), specializing in synthesis, place & route, STA and design convergence.Extensive experience in planning (PnR lead), implementing and converging large PnR designs (9M gate count) on TSMC & Intel advanced nodes.Solid track record as a Intel Custom Foundry representative, supporting SoC design clients in Asia.Pioneer member in adopting and improving new flows and methodologies. Interest in PD or CAD lead roles to deliver high quality, first in market silicon products. Areas of Proficiency- Place & Route- Design Convergence- Static Timing Analysis- Functional ECO- Timing Constraints Development- Synthesis- IR/EM Analysis- LEC (conformal/formality)- TCL, Perl, shell scripting
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Mts Silicon Design EngineerAmd May 2024 - PresentSingaporePhysical Design Lead for AMD's multi-gigabit transceiver and programmable RFSoC devices -
Sr. Silicon Design EngineerAmd Feb 2022 - Apr 2024Singapore, Singapore
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Sr. Physical Design EngineerXilinx Dec 2021 - Jan 2022SingaporeDigital Physical Implementation of Xilinx's Multi-gigabit transceiver and programmable RFSoCResponsible for the planning and implementation of 7nm and 16nm designs ( >5M instance count post synthesis & > 3mm2 partition) -
Physical Design EngineerXilinx Dec 2019 - Nov 2021SingaporeDigital Physical Implementation of Xilinx's Multi-gigabit transceiver and programmable RFSoC
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Senior Physical Design EngineerIntel Corporation Aug 2016 - Dec 2019Penang, MalaysiaPartition Execution Owner (PEO) for multiple advanced process node chipset designs.Key achievements include RTL to GDS implementation of a 9M gatecount block with 200+ macros.Project fDRC sign off owner, responsible for project's maxcap & max transition constraints, convergences and waivers.Responsible for the planning, development and support of Intel's inhouse design quality checking tool. -
Software Engineer (Design Automation)Intel Corporation Feb 2014 - Jul 2016Penang, MalaysiaCAD tool owner responsible for the planning, development and support of physical design and analog circuit verification related flows and methodology.Sole Intel Custom Foundry (ICF) representative rolling out DRC autofixing tool for SoC design companies in Asia.
Aaron Yong Yew Yeap Education Details
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First Class Honours (H1) -
3.88/4.0
Frequently Asked Questions about Aaron Yong Yew Yeap
What company does Aaron Yong Yew Yeap work for?
Aaron Yong Yew Yeap works for Amd
What is Aaron Yong Yew Yeap's role at the current company?
Aaron Yong Yew Yeap's current role is MTS Silicon Design Engineer at AMD.
What schools did Aaron Yong Yew Yeap attend?
Aaron Yong Yew Yeap attended Monash University, Universiti Teknologi Malaysia.
Who are Aaron Yong Yew Yeap's colleagues?
Aaron Yong Yew Yeap's colleagues are Ayunda N, Iulia Miruna Tiliute, Reynard Blasa, Monica Yadav, Siva Dangeti, Ph.d., Pmp, Jayashree Subramaniam, Ken Ferreira.
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