Cody Abel Email & Phone Number

Hillsboro, Oregon, United States

Portland, Oregon, United States

Maintain sole responsibility for support, documentation, and continuous improvement of implementation flow developed in previous role. Address user requests and bugs while incorporating numerous enhancements. Publish comprehensive Confluence pages offering detailed documentation and usage guidance.Provide ongoing mentorship to a junior engineer located in Malaysia.Implemented a complex functional ECO on a 6nm top-level, utilizing interactive sessions in Genus, Tempus, Innovus, and Conformal LEC.

Portland, Oregon, United States

Conceptualized and developed a comprehensive automated flow facilitating RTL to pre-layoutnetlist for advanced technology nodes (12nm, 6nm, 3nm, etc.). The versatile flow supports synthesis, LEC, Memory BIST insertion, DFT insertion, UPF-driven isolation cell insertion, CLP, ATPG, and advanced features like physically-aware synthesis (iSpatial) and vector-driven synthesis. Conducted training sessions and provided documentation to users.Fostered collaboration with CAD team to optimize design flow efficiency.Managed top-level synthesis for a 6nm SSD controller, collaborating closely with the design team to overcome multiple implementation challenges. Established the top-level STA environment and project level constraints.Assisted multiple projects with top-level timing closure and audits.

Portland, Oregon, United States

Led implementation team to validate next generation back-end flows on 6nm test chip. Responsible for planning and establishing flows related to synthesis, test insertion, and STA. Trained and supervised a multicultural team to execute advanced synthesis techniques.Maintained and improved synthesis flow for all 16nm projects across multiple business units, regularly resolving bugs and providing user support.Played a key role in the successful implementation of multiple digital blocks and top-levels across several technology nodes.

Portland, Oregon Area

Contributed to the digital implementation of multiple successful projects. Executed synthesis, memory BIST insertion, DFT insertion, and static timing analysis for both block and top-level.

Clatskanie, Or

Glue Autofill System: Designed a system for monitoring core glue levels and initiating automatic refills upon detecting a low level in the container. Effectively streamlined operations by automating a previously manual task.Trapped Key Safety Interlock Switches: Modified the electrical drawings, logic programs, and HMI programs for all stretch wrappers to include safety switches. Removing a key from the switch ensures the machine will not start, guaranteeing safety to workers inside the machine. Diverter Palletizer Switching: Implemented logic to the diverter program to control conveyors and allow automated switching between palletizers to increase throughput.Bundler HMI Program Conversion: Completed a program conversion from RSView32 to FactoryTalk View SE. This required extensive VBA programming along with setting up alarms, menu navigation, communications, and ensuring all buttons in over 70 displays functioned normally.

Hillsboro, Or

USB Type C Daughtercard: Responsible for project scheduling, schematic capture, vendor communication, component selection, and leading design reviews. Collaborated with CAD engineer to ensure successful PCB layout. The board implements USB Type C port logic to simulate connecting a USB host to a USB device. The results of this project will benefit all future projects involving USB Type C at Intel.

Hillsboro, Or

Performed multiple tasks including opening and closing the store, retrieving carts, restroom maintenance, store sanitation, stocking items, and customer service.