Digital Design Engineer
Current- Developed Serial EEPROM controller, Power-Up Sequence State Machines, and Non-Volatile Memory Controller for read and write operations. Conducted design, synthesis, prototyping, and testing of the serial interface.- Led a critical debugging effort on the Jitter Attenuator chip, successfully resolving complex issues related to the SPI Interface, enhancing overall chip quality and reliability factor.- Developed and tested single SPI and I2C interface modules.- Designed and implemented FPGA and command libraries, as well as MCU-based testing libraries.