Adiwena Putra Email & Phone Number

West Java, Indonesia

Daejeon, South Korea

Bandung, West Java, Indonesia

I work on a research topic about AI accelerator for Tiny Yolo Algorithm. The accelerator was built on Xilinx Ultrascale FPGA. I implement the accelerator from scratch using Vitis HLS.

Bandung Area, West Java, Indonesia

I help the Minister with paper work, also i need to make sure that Academic Division agenda working properly as planed. The agenda of academic division is focusing on academic matter including the college tuition and giving the tutorial for the student.

Bandung Area, West Java, Indonesia

I compile the book contains a collection of questions, in addition I also giving tutor in order to give better understanding about the electrical engineering lessons for other students.

Bandung, West Java, Indonesia

- Develop RNG library for new board product.- Develop serial UART library for new board product.- Testing on RNG and UART performance for new board product.

I was an assistant lecturer in a digital signal processing class. My job is to teach additional material which is not covered in class. I was also asked to conduct a tutorial for the students and write the solution for exam problems.

Bandung Area, West Java, Indonesia

• Do the documentation and research for the improvement of next generation team.• Design the Payload system for Rocket Model Monitoring System.• Design the GUI and Communication System for Rocket Model Monitoring System.

Bandung Area, West Java, Indonesia

• Educate all the staff in System Division.• Do some research to apply new system on the rocket.

Bandung

I made the design for GUI and all modules that were needed for spacecraft model monitoring system.

Taipei City, Taiwan

Selected as 1 of the 4 student from ITB to do internship in National Taiwan University of Science and Technology (NTUST), and the only one student from Indonesia that do internship on the National Taiwan University's Lab (NTU). The Research Intern is done in Professor Shen-luan Liu's Electronic Circuit Lab. The research topic is about the Phase Locked Loop (PLL) Jitter Optimization. During this intern I manage to improve the jitter in PLL using the counter and neural network as predictive controller and produce the behavioural model for this system in Simulink. I also do the presentation to NTU and NTUST for the result of my work.

Doctor Of Philosophy - Phd, Electrical And Electronics Engineering

Master'S Degree, Electrical And Electronics Engineering

Bachelor'S Degree, Electrical And Electronics Engineering, Cumlaude

Activities and Societies: Robotics Team ITB, Electrical Engineering Student Association, ITB Badminton ClubBachelor Thesis: Data.

Science Class