Namrata Agarwal Email & Phone Number

Working as Post silicon validation lead & project owner for Audio sub system across various CPU products. Responsibilities include:- Keeping track of all the upcoming deadlines across different projects and work with teams to ensure smooth and on time delivery of the deliverables. - Working closely with partners like architects, designers, pre silicon validators to create the validation coverage matrix and influence them to find and mitigate any gaps in the validation coverage.- Getting involved in product architecture phase to influence design changes for better validation coverage in post silicon.- Provide technical guidance, coaching, and mentorship to other engineers and help them to with their growth

Worked on post silicon hardware validation for Audio subsystem for multiple generations of client/SOC products. During the course of this role:- Created & defined the validation strategy, requirements, environments, tools, and methodologies including debug board and hardware/software requirements needed for successful hardware validation- Applied validation principles and techniques to write test plans to validate the hardware interface and its interaction with system flows like power management, security, display- Developed the test content & test suites to efficiently validate the audio hardware interface. - Tracked test progress & completed execution in a timely manner to meet all milestones starting from Power On till customer enabling. - Debugged & root caused the bugs to SW or HW components and worked with Design engineers to introduce fixes in the existing and upcoming projects. Ran regressions to validate the fixes.- Worked on analyzing the test data and provided feedback regarding improvement areas to Program leadership, Architecture, design engineers, Software and Firmware teams

Worked as a test program engineer & module owner focusing on sort as well as class environment on various CPU & PCH products to detect structural issues.Responsibilities included development & validation of test programs for wafer as well as chip starting from power on till the shipping of the product to customers. Debugged & enabled several new features in the content, added timing/level updates & recovery flows. Also worked on collecting & analyzing the test results data and presenting to the stakeholders.

Worked as a platform validation engineer on various chipset products. Responsibilities included functional validation of interfaces like audio & display as well as structural validation using class test programs on CMT testers.