This program provided a comprehensive understanding of 5G network architecture and protocol stack, highlighting the transition from 4G to 5G. It covered:• Fundamentals of wireless signal processing and key communication blocks for data transmission• Wired fundamentals related to 5G RAN functionality, including functional splits and data planes(control, user, sync, and management)• Hardware platforms utilized in 5G processingThrough hands-on workshops using network simulators and emulators, participants gained practical experience and deepenedtheir understanding of 5G network behavior, focusing on the end-to-end flow from 5G user equipment to the core network.

"Digital Design and Verification of 5G-NR Physical Uplink-Shared Channel (PUSCH) Chain"• Understanding OFDM/SC-FDMA systems and 3GPP TS 38.211/212 Docs.• Determining of the PUSCH Blocks Specs.• Floating Point MATLAB Modeling for the PUSCH Chain.• Fixed Point MATLAB Modeling for [2048-IFFT & DFT-Precoding Mixed radix (2,3,5) using Single-path delay feedback (SDF) Architecture] and Reference symbols generation (DMRS) to achieve a required performance measured by Signal-to-Quantization noise ratio (SQNR) metric.• Preparing Hardware Architecture then RTL Design using SystemVerilog For the PUSCH Chain.• PUSCH sub-blocks integration & Verification.• Sub-Block & System level logical synthesis.