Ajith Kumar B Email & Phone Number

Bengaluru, Karnataka, India

Bengaluru Area, India

As a founding member, I led the setup and growth of the Akridata team in India, scaling up organically to 50+ engineers across variety of skills ranging from systems development, web backend, web UI, ML algorithms and quality. The role included technical and operational responsibilities.

Bengaluru Area, India

Lead a SW engineering team of 4 reporting to WD research organization specifically focusing on conception, design, prototyping and evaluation of future product ideas and features related to high performance storage technologies. Key areas of work consists ofa. Inline data reduction(compression, de-duplication) using similarity based techniques for high performance flash storage devices and systems.b. Dynamic paging of flash translation structures.c. Exploring rack level NVME-over-fabric shared storage for big data workload specifically on optimizing HDFS and Spark stack using shared storage and FPGA based acceleration.d. Exploratory research on understanding system interactions of machine learning(ML) algorithms and FPGA based acceleration of ML algorithms.

Bengaluru Area, India

As a technical lead was involved ina. designing and implementing various features on high performance PCI-E flash product(FlashMax) in the areas of flash reliability characterization and enhancements.b. Owning performance characterization and improvement activities with an end-to-end system view(multiple layers of SW stack -> RTL architecture -> flash) of performance behavior.c. Training and mentoring of new team members.

Bengaluru

Being an early member of Virident engineering team, had opportunity to take on key technical roles and grow up progressively from individual developer to a lead in our startup's journey towards pioneering high performance PCI-E SSD family of products with key involvements being. a. Development of a custom file system for EcoRAM(NOR flash based product) as an attempt towards enabling system level consumption of storage class memory.b. Development of SW layer responsible for abstracting HW level topology intricacies and providing capabilities like flash aware IO scheduling, thermal and power monitoring and feed back based IO rate control at a very fine granularity.c. Full stack performance characterisation and improvements in areas of latency reduction, eliminating various SW bottlenecks in a multi-threaded linux kernel driver implementation, providing optimal HW level resource utilisation, fine grained IO QOS, dynamic behaviour modification based on automatic workload detection for optimal performance for varying workloads etc.d. Predictable and consistent performance behaviour through co-ordination of foreground(new IO) and background(Garbage collection) activities.e. Testability improvements using sophisticated flash media error simulation capabilities.

Bengaluru Area, India

Involved in development and sustenance activies on HP Enterprise Virtual Array Firmware.

Bengaluru Area, India

Involved in development and sustenance activities on a data backup/recovery application named "HP Openview Storage Data Protector".