During my internship period, I have mainly worked in the domain of FPGAs and Digital Signal Processing. My primary job was to design various signal processing circuits using Xilinx IPs using the Vivado Design Suite. I used VHDL to design the circuits. Matlab was used to verify the working of the circuits before implementing it in VHDL. I have also worked in the TFTP booting of Xilinx FPGA devices using Petalinux.