Currently leading hardware development efforts spanning scalable and secure computing architectures, formally verified embedded hardware root-of-trust systems, and hybrid cyber-range threat assessment and training platforms. Guiding system development through architecture design, RTL implementation, FPGA prototyping, ASIC tape-out, PCB fabrication/bring-up, and productization. Supporting sponsors and customers with engineering expertise and solutions tailored to each situation’s unique security challenges.

Lead for the Secure, Trusted, and Assured Microelectronics (STAM) Center’s prototyping FPGA and ASIC development efforts. Investigate end-to-end system designs and FPGA/ASIC prototypes for memory safety/security solutions for Big Global Address Space (BGAS) architectures, edge-to-cloud continuum architectures, and low-power hardware root-of-trust designs for safety-related embedded and Operational Technology (OT) systems.