Alex Simand Email & Phone Number

Redmond, Washington, Us

Redmond, Washington, Us

NoC DesignAMBA InterconnectSystem-level integration, CDC, LINT, coverage

Chandler, Az, Us

- Developed, tested, and integrated memory IP subsystems: QDR II, QDR II+, DDR3, DDR4, LPDDR3, SDR, and several DMA IP- Developed, tested, and integrated various peripheral IP: I2C/ SPI, PCI, MMC, and others- Performed full-chip simulation and FPGA emulation - Brought up boards and validated IP in concert with System Validation group- Modified and maintained DSP (Reed-Solomon) encoding hardware in both Verilog HDL and VHDL- Developed RTL testbenches for user application verification- Worked with Verification groups to ensure adherence to industry specifications- Maintained C-code and SystemVerilog for verification and generation- Maintained model in C-code to verify hardware algorithms- Wrote user documentation (Handbooks, Release Notes) outlining use of hardware in Microsemi FPGA's

• Developed and maintained cohesive voice across multiple content contributors• Wrote creative and informational blog posts targeted to a diverse audience• Edited team blog posts, managing multiple posts simultaneously and providing global and marginal revisions• Managed team of seven writers; established publication schedule and enforced deadlines • Increased traffic to Lunch Ticket, bringing new readers to the publication

• Oversaw a team of four assistant editors, leading weekly discussions that focused on goals, submission selection, and communication strategies• Collaborated with content writers to brainstorm ideas and develop work for online publication• Compiled detailed reports on submissions, highlighting each one’s strengths and weaknesses

- Developed and maintained complex embedded system to demonstrate use of Actel mixed-signal FPGA in a power-management application- Worked with Product Marketing to develop system specifications intended to compete against (discrete) ASSP parts like TI's UCD9081 power supply sequencer- Developed, tested, and maintained ARM Cortex M1-targeted application C-code to perform analog scanning, channel sequencing, and voltage margining- Validated hardware performance against specifications- Developed Verilog HDL and VHDL for General Purpose Input/Output (GPIO) hardware interfacing with the AMBA Peripheral Bus (APB)- Worked with Firmware engineers to define register interface and configurable interrupt generation specification- Developed HDL verification environment- Validated soft DAC in Actel mixed-signal FPGA against comparable discrete parts- Used low-ripple pulse-width modulator in Verilog HDL and oscilloscope capture to measure accuracy and ripple- Maintained RTL code for serial interfaces: SPI, I2C, SMBus, and UART

- Debugged and maintained board-level loop-back test for ARINC 429 design using 8051 application - Automated hardware core packaging process for use within IP Development team using Perl

Basc, Electrical Engineering

Master Of Fine Arts - Mfa, Creative Writing