Amir Asgari Email & Phone Number

Main domains of recruitment expertise:1. Semiconductor (extensively): Board Design, Chip Design, VLSI, Logic Design (Verilog/VHDL), Verification, Validation, Physical Design, Synthesis/Timing, Design For Test (DFT), IC Mask Layout, Packaging, Circuit Design, Digital, Analog, Mixed Signal, Low Power, Signal and Power Integrity, Prototype, Bring-up, Post Silicon, FPGA, Diagnostic, Technical Writing, Embedded Firmware, SPICE, PSPICE, RF, RFID. 2. Wireless & Mobile Communications (LTE/G5/G4/G3/G2), Networking & Telecommunications, Automation3. Software development/Tests, Cloud Computing, Enterprise & Mobile Security sectors, IoT, Full Stack, etc. Specific specializations: A. Linux/Unix/Windows, SQL, C#, Objective-C, Perl/TCL/SHELL, ANDROID/IOS B. Web languages: JavaScript, Java, Python Django/Flask, CSS, PHP, Ruby/Rails, C++, C language, HTMLC. Data Analytics, Big Data, Machine/Deep Learning4. Quality Assurance, Quality Control, Cosmetics, Biomedical Engineers, Pharmas, Biotech, Medical devices, Access & Affairs, Regulatory Affairs, Clinical (Operations), FDA regularities, Process Technologies, Sales & Marketing, and (higher) management (incl. board).5. Electronics: Various board designs, HMI, PCB, Altium, ORCAD, PADS, Solder, Thru-hole, Surface Mount, Real Time Design, Power Electronics, Controls Systems, Sensors, Power Electronics, Power Handling, Low Power Sensing, Matlab, Simulink, Labview, Spectrum Analyzer, Electro-Magnetics, Amplifiers, Dry Etching, Scanning Electron Microscope, Tests, Wafer-Level Board Packaging, Technician, etc.6. Technical Information Technology (IT) support and development.7. Program/Project Manager (PMI and/or PMP)- Please call me at 919.656.9557

Armonk, New York, Ny, Us

• Focal point for all IBM PowerPC microprocessor Level 3 support hardware and software issues.• Managed issues database, assigned priorities, worked closely with the global team (multiple disciplines), 3rd parties and customers on successful technical analysis and resolution. Provided weekly status to upper management. Maintained strong and favorable relationships with our clients. • Managed projects and resolved 900+ issues in less than 3 years with savings of over $250 M.• Held meetings with the team to develop and productively recommend better service quality improvements to our partners and customers.• Coordinated 3rd party core updates/fixes to effectively merge into IBM release processes. • Effectively managed post mortem/lessons learned to identify opportunities to eliminate future customer issues, increasing customer satisfaction and performance in the marketplace.

Armonk, New York, Ny, Us

• Managed and led full execution of multi IP verification taskforce on system on chip for PPC476 microprocessor and bus interface cores. Created and established global strategy and planning among cross functions and 3rd parties.• Successfully brought in the project, released to several IBM internal and external customers. o Managed 26 global technical professional overseeing verification plan, test plan, gathering tests, establishing environment and modeling in high level design language, test cases in deterministic and random format, coverage points, checkers, monitors and modified new functionalities. o Hosted “post mortem/lessons learned” analysis to ensure correct processes were applied.• In PowerPC 476 processor verification, led a global processor verification team of 16 professionals in US and India in 2 different companies, working with technical leads on definitions, work assignments, schedules and milestones. The processor was released to our external customer LSI and IBM internal customers on time without any severity 1, 2 or 3 defects. • For the PLB6 (bridge interface core), released PLB6 cores to IBM internal and external customers on time and with zero defects. Managed the global logic and verification team: managed and maintained overall schedule, worked with logic and verification leads to ensure key milestones were achieved on time, actively worked with 3rd party IP (Cadence) on modeling and environment deliverable and worked closely with other geographical managers and engineers to successfully balance resources and tasks during the critical juncture of the projects.• Worked closely with customers and achieved successful implementation and execution of core releases in their environments with no impact to their schedules. Managed the following Releases: Managed and led a team of 5 in US, India and China developing and releasing Smart Models and Architectural Verification Programs for several PowerPC processors (PPC405S/460S/470S).

Armonk, New York, Ny, Us

• Achieved technical project management from kick-off to prototype release to customer. This included Initial Design Review (IDR), release to floor-plan, preliminary design, layout, checking, mask and prototype delivery. • Planned and managed technical reviews, drove closure of all technical issues, execution and follow-up. Identified and resolved technical risk areas and schedule impacts. Tracked custom and new technology development commitments related to individual designs. • Managed resources, schedule and cost relative to quote sizing. • Drove weekly meetings with customer, IBM system engineering, sales teams and communicated the results to upper management and held “lessons learned” reviews with customer and IBM teams at the end of each project.• Managed development of Six chips (Cisco, Nortel, China Huawei/HiSilicon) in 90/130 nm by going beyond expectations to insure successful completion, including providing technical quotes and expertise to customers, pre-sales and FAE team for customer executive briefing as well as new business opportunities• Executed on new AB's, and B's (metal only) releases to support development & standard products.• Actively engaged with colleagues on Post Release to Manufacturing chip follow ups, working with manufacturing and sales to insure efficient production and first time right decisions. • Insured talent development by sharing knowledge with colleagues, contributing to the ASIC Design Center community thru publications, skill group exchanges and mentoring.

Armonk, New York, Ny, Us

• Chosen for leadership responsibilities after stepping up to an open management position after the sudden departure of three levels of design team management and critical experienced design team members (52 hardware and software engineers). Re-staffed the team and delivered PowerPC 450 microprocessor core to several internal and external customers. • Received IBM corporate awards for outstanding management and delivery of key business products: o Managed overall micro-architecture, logic design, synthesis, timing, and verification team of the PPC450 microprocessor and the PPC450L2 cache unit. o Facilitated strong technical communications with key customers, such as the IBM Server Group and various IBM external customers (SONY, LSI, Ericsson, AMCC). o Managed and delivered the Smart and CycleSim models for PPC450 and CoreConnect customers.• Managed the team and provided random test-case generation tool support (primary tools support interface to IBM Research, Haifa) for microprocessor and peripheral cores.

Armonk, New York, Ny, Us

• Worked and contributed to several engineering divisions and accelerated through ranking with leadership roles and ultimately into management positions.• Designed/Verified/Timed memory controller, bridges and several IO controllers for PS2 servers. Verified local & system bus, developed test-bench environment, models and written many test-cases.• Worked on PC AT mother board and completed many tests in several LABs and EMC chamber.

M.S. Degree, Electrical & Computer Engineering

B.S. Degree, Electrical & Computer Engineering

B.S. Degree, Physics