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Experienced in Product, System and algorithms development process, from definition to production.Expert in Architecture, Algorithms, development and management of cutting-edge Products, SoCs and IPs to various markets, including HealthCare, Artificial Intelligence / Deep Learning, imaging and wireless infrastructure.Senior Principal Engineer at Intel and former Senior Member of the Technical staff at FreescaleMain experience in: - Architecture of Deep Learning systems - AI Algorithms, Machine-Learning and Data science - Imaging Systems and architecture - DSP cores, IPs and SoCs architecture - IPs and SoCs Design manager, from architecture to GDSII - Low power architecture and designPublications and Patents: - 4 publications - 14 Patents approved and additional 4 in preliminary stagesEmail: amit.gur.2000@gmail.com
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Healthcare-Ai CtoIntel Corporation Jan 2023 - PresentSanta Clara, California, Us -
Artificial Intelligence System Architecture And Algorithm Leader, Intel Senior Principal EngineerIntel Corporation Jul 2020 - Feb 2023Santa Clara, California, UsArchitecture of datacenter AI solutions and DL algorithms:- Developing Healthcare AI solutions with leading hospitals in ISR and US.- Develop SOTA DL algorithms (DLRM, GNNs, Transformers/Timesformers, AutoML etc.) with leading universities and industry leaders- Defining the future of CPU/GPU/XPU AI systems and cloud solutions - AI based performance optimizations
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Artificial Intelligence Chief Product Architect, Intel Senior Principal EngineerIntel Corporation Jul 2017 - Jun 2020Santa Clara, California, Us• Leading the Product Architecture of an Artificial Intelligence acceleration card for Datacenter • System Definition ownership• Definition includes specs/requirements to AI algorithms, Runtime SW, Compiler, Board, SoC, silicon IPs and manufacturing• Owning the customer technical engagement. Working with the lead customers on detailed requirements and implementation• Product debug lead
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Imaging System Architecture Leader, Intel Principal EngineerIntel Corporation Jul 2013 - Jul 2017Santa Clara, California, Us• Managing the IP architecture team• Architecture definition ownership for Intel imaging system (camera pipe), including specs for HW development, Algorithms, SW drivers, SoC I/F and external camera modules • HW IP Power & Performance owner
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Soc Project ManagerFreescale Semiconductor Jul 2012 - Jun 2013Austin, Texas, UsSoC Project manager.- Managing full SoC from definition to production.- Market: Macro/Metro Base-stations, WCDMA, LTE, A-LTE. Process: 28nm- Responsibility for all Hardware project aspects, from Architecture to production, including all IP and SoC design aspects (Design, Verification, Integration, DFT, Backend, Circuit and Validation). -
Architect, Physical Layer And Soc, Freescale Senior Member Of The Technical StaffFreescale Semiconductor Nov 2010 - Oct 2012Austin, Texas, UsNext generation wireless base-station SoC and Layer 1 Architect- Definition of WCDMA / LTE / A-LTE Layer 1-3: Data flows, Interconnect (AXI based), power modes, clock modes and overall responsibility on the Architecture- Physical layer Detailed definition (DSP Layer 1)
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Front-End Manager For All Dsp Socs In FreescaleFreescale Semiconductor Dec 2008 - Feb 2012Austin, Texas, UsManaging a cross functional team for all Freescale DSP projects, including 26 engineers in Israel and 19 in India.Responsible for the following SOC development stages:- Micro-architecture- Logic Design- Verification- Logic integration- Test Program- Silicon ValidationExecution of several projects in the above disciplines, including methodology definition, schedule and human resource planning and tracking.Responsibility on external deliveries and SOWs (vendors, customers and other teams in the project).
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Design Project ManagerFreescale Semiconductor Jan 2005 - Nov 2008Austin, Texas, UsManaging several projects, including:- Architecture Definition and implementation of L2-cache, M2 memory, AXI 3 I/F, Nexus trace, asynchronous I/F and more.- Architecture Definition and implementation of Low power modes: dynamic power Gating, SRPG and DVFS- DSP platform for cellular handsets.- ARM core and platform verification- Test chip manager in 65nm LPIn all projects, Full project responsibility.- Architecture- RTL Design- Logic Verification- Back End integration- DFT- Physical Design
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Verification LeaderFreescale Semiconductor Apr 2002 - Jan 2005Austin, Texas, UsProject verification leader- Responsible for DSP core all the logic verification- Leading the verification team- Driving a new methodology definition and implementation in SystemC
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Design EngineerFreescale Semiconductor Sep 1999 - Apr 2002Austin, Texas, UsVarious design tasks in a team developing cache system for a DSP core- Logic verification- Micro-architecture- RTL Design- BackEnd integration
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Dsp Application EngineerFreescale Semiconductor Aug 1997 - Sep 1999Austin, Texas, UsWriting kernels and Vocoders on StarCore DSP- EFR, AMR codecs- DSP benchmarks (FFT, Filters, Contol code)- ADSL modem
Amit Gur Skills
Amit Gur Education Details
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Tel Aviv UniversityBio-Medical Engineering -
Ben-Gurion University Of The NegevElectrical Engineering
Frequently Asked Questions about Amit Gur
What company does Amit Gur work for?
Amit Gur works for Intel Corporation
What is Amit Gur's role at the current company?
Amit Gur's current role is Intel, Healthcare-AI CTO.
What is Amit Gur's email address?
Amit Gur's email address is am****@****ale.com
What is Amit Gur's direct phone number?
Amit Gur's direct phone number is (408) 765*****
What schools did Amit Gur attend?
Amit Gur attended Tel Aviv University, Ben-Gurion University Of The Negev.
What skills is Amit Gur known for?
Amit Gur has skills like Soc, Vlsi, Rtl Design, Functional Verification, Asic, Processors, Semiconductors, Verilog, Hardware Design, Power Management, System Architecture, Digital Signal Processors.
Who are Amit Gur's colleagues?
Amit Gur's colleagues are Nikola Tesla, Zheng He, Frans J Pieterse, Sanket Shingte, Pøźź Chhea, Lyn D George, Mohd Sukri Mohd Rosli.
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