Antoine Morvan Email & Phone Number

Rennes, FR

Greater Rennes Metropolitan Area

• Senior Technical Engineer - HPC Application Expert Center for Excellence in Performance ProgrammingHPC Services & Projects - Application & Performance - HPC, AI & Quantum Global Business Line – BDSBull SAS.
• EUPEX: European modular Exascale-ready pilot system (https://eupex.eu/)
• EPI-SGA2: European Processor Initiative (EPI) (https://www.european-processor-initiative.eu/)
• EMOPASS: Exascale Microprocesseur et Outils pour la Performance des Applications Stratégiques et Scientifiques (https://emopass.fr/)
• CLUSSTER: Cloud Unifié Souverain de Services, de Technologies et d'Infrastructures (https://www.genci.fr/actualites/clusster-la-premiere-initiative-cloud-francaise-pour-la-recherche-universitaire-et)
• ESIWACE3: The Centre of Excellence in Simulation of Weather and Climate in Europe (https://www.esiwace.eu/)

Rennes Et Périphérie

• Senior Technical Engineer - HPC Application ExpertHPC Services & Projects - Application & Performance - HPC, AI & Quantum Global Business Line – BDSBull SAS (Atos Group)---------Playing with super computers and their.
• EUPEX: European modular Exascale-ready pilot system (https://eupex.eu/)
• EPI-SGA2: European Processor Initiative (EPI) (https://www.european-processor-initiative.eu/)
• EMOPASS: Exascale Microprocesseur et Outils pour la Performance des Applications Stratégiques et Scientifiques (https://emopass.fr/)

Rennes Area, France

Technical lead over the DataNavigator solution ◾ Typescript library (Node.js & Webpack) for querying SPARQL endpoints ◽ New query abstraction, code generation ◾ Backend Node.js (Express.js, TypeORM, io-ts) & client API; Auth0 access management ◽ Simple DB for managing user permissionsSupervising interns & dev team (VueJS / Typescript UI with UX designer.

Rennes Area, France

• Technical lead over the rapid prototyping software PREESM (https://preesm.github.io/)
• Technical integration and support within CERBERO project (https://www.cerbero-h2020.eu/)
• Complete redesign of the continuous integration system
• Formal definition of the abstractions manipulated within the tool
• Scheduling, memory allocation, task mapping targeting heterogeneous architectures
• Distributed code generation with custom netcode (MPI-like send/receive/barrier over TCP)

Rennes Area, France

• Echoes-Labs subsidiary of MetrixwareDesign and Implementation of Tools for Automated Software Modernization
• Implementation within the RAPID project (https://echoes.fr/rapid/)Migration from proprietary Java framework to Spring MVC
• includes JavaScript to Java automatic migrationSoftware code audit of web applications (AngularJS, Spring, Hibernate)Assisting the setup of a Software Factory (Jenkins, Redmine, Git)

Région De Rennes, France

• Technical Leader over the GeCoS (Generic Compiler Suite) tool
• GeCoS: http://gecos.gforge.inria.fr/
• Developing, testing, documenting, and integrating 500k+ lines of Eclipse/Java/C
• Technical integration for the ALMA European project (http://www.alma-project.eu/)
• Compiling Scilab for heterogeneous multicore reconfigurable architectures
• Automatic Loop Vectorization with Hardware Specifications as input

Région De Rennes, France

• Nano 2012 project S2S4HLS with STMicroelectronicsSource-to-source for High-Level Synthesis toolbox within GeCoS
• Implement classic compiler optimisations, driven by custom #pragmas: unroll, inline, dead code elimination, constant propagation
• Exhibit efficient code structures and memory layouts in compute kernels using high level mathematical abstraction: the polyhedral modelImplementation of ompVerify with Colorado State University (see IWOMP’11 publication)
• Part of the LRS joint team (http://polyweb.irisa.fr/LRS/)
• Automatic verification of OpenMP #pragma on for parallel loopsAutomatic C to Alphabets (system of equations: https://www.cs.colostate.edu/AlphaZ/)Improve applicability of nested loop pipelining (see dissertation.

Doctor Of Philosophy (Ph.D.), Computer Science

The goal of this thesis is to improve the productivity of current hardware design flows by applying state-of-the-art optimizations from.

Master'S Degree, Computer Science

Bachelor'S Degree, Computer Science

Dut, Computer Science