Staff Design Enablement Engineer (Standard Cells Benchmarking And Ppa Optimization)
I am working on standard cell benchmarking for different intel technologies (Intel 18A GAA RibbonFET), Intel3 ..etc. We developed a python-based tool to generate hspice flows to evaluate std cell PPA (leakage power, Dynamic Power & Delay) for both combinational &sequential cells. it includes the capability to explore the impact of random variation via Monte Carlo as well as Vt targetting. using this tool, we evaluate technology maturity across PDKs and we also explore pathways (DTCO) for PPA optimization to fit diverse products specs in collaboration with the technology development team.