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Naveen Agrawal Email & Phone Number

Director Of Engineering at Intel Technologies India
Location: Bengaluru, Karnataka, India 8 work roles 1 school
1 work email found @intel.com LinkedIn matched
✓ Verified July 2026 4 data sources Profile completeness 100%

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Current company
Role
Director Of Engineering
Location
Bengaluru, Karnataka, India
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Naveen Agrawal is listed as Director Of Engineering at Intel Technologies India, a with 224 employees, based in Bengaluru, Karnataka, India. AeroLeads shows a work email signal at intel.com and a matched LinkedIn profile for Naveen Agrawal.

Naveen Agrawal previously worked as Senior Director of Engineering at Intel Technologies India and Director Program Management at Qualcomm. Naveen Agrawal holds Bachelor Of Engineering - Be, Electrical Engineering from Indian Institute Of Technology, Roorkee.

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{first}.{last}@intel.com
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Profile bio

About Naveen Agrawal

I have over two decades of experience in driving innovation and delivering impactful results. My ability to see the big picture and connect individual contributions to broader organizational goals is unparalleled. A natural problem-solver, I excel at navigating complex challenges and breaking them down into actionable steps.As a strong advocate, I foster a culture of motivation, empowerment, and continuous improvement. I strike a balance between providing guidance and encouraging independence, allowing team members to thrive and take ownership of their work. My keen eye for detail ensures that no aspect of a project is overlooked, while my strategic mindset keeps the team focused on achieving long-term objectives.My extensive experience in semiconductor design, firmware development, and team leadership has equipped me with a deep understanding of the technical nuances and organizational dynamics required to succeed in today's fast-paced industry. My passion for building high-performing teams and my commitment to operational excellence have consistently delivered exceptional outcomes. Experience Summary 24 years of experience working on ARM based Application processor/Modems, Intel Client based designs, Intel Server Architectures 13+ years of people management experience with senior experts with nested and matrixed reporting Led multiple differentiated IPs/Subsystems and SoC programs from concept to production. Handson experience of silicon design and development flows Front ended customer interface to enable launch of 3 mobile handsets on different operating systems within one year. Founding member of the Texas Instruments India Wireless Design Center at Bengaluru (Bangalore). Helped in leading chip design activities to grow India operations from 12 to 250+ strong team. Enthusiastic about continuous learning and bringing in process improvements for better quality and efficiency. Led initiatives to harness innovation in Intel as well as in previous organization. Ability to connect organization objectives while fulfilling individual desires to achieve the best outcomes of everyone.Key Skills:Program managementProduct management Product strategyStrategic planning and organizational leadershipTechnical leadership & mentoring Process improvements Resource & conflict managementStrong relationship management & change managementSpecialties: ExecutionOrganization DevelopmentExecution Excellence Leadership PPA Wireless Product Innovation Organization Building Development

Listed skills include Omap, Soc, Physical Design, Rtl Design, and 15 others.

Current workplace

Naveen Agrawal's current company

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Intel Technologies India
Intel Technologies India
Director Of Engineering
Bengaluru, KA, IN
Website
Employees
224
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8 roles

Naveen Agrawal work experience

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Senior Director Of Engineering

Current

Leading Networking Server SoC ArchitectureNetworking Server SoC Architecture team is significantly senior and experienced team defining and leading next generation networking server SoCs which is catering to multiple segments of market like Networking, SASE, 5G, Storage, Edge and IOTG. Along with architecture team, also managed the development of firmware including power management, reset, boot etc. for 2 years before the team got moved to another organization due to re-org.Responsibilities – Senior Director, Silicon Design Engineeringo Leading the vector of AI adoption in Silicon design to democratize information availability and improve individual and team's productivity o Took ownership of firmware team and helped them to streamline NEX charter to solve the quality problem with the firmware. Now NEX has a dedicated firmware team for its own projects despite the team moving to different organization.o Enabled the team to continue focus on the execution and signoff quality by running active workgroups and end-2-end usecase based reviews.o Leading multiple initiatives e.g. organized the very first Org Product Day where 70 papers were submitted and the event was attended by 300+ engineers. o Led the security belt certifications where entire organization has met goals of White Belt, Yellow Belt and Security for Managers such that overall NEX in India as already met Whitebelt and Yellow belt goals!o Encouraging team members to accept challenges head on and driving brainstorming sessions to come up with better solution to solve complex problems.

Jul 2021 - Present

Director Of Engineering

SoC development for IOT BU Intel has various businesses including in Servers, Desktops, Laptops and Industrial IOT. In IOT the focus is primarily industrial customers apart from other businesses including energy, retail and surveillance. We are working on expanding Intel’s market share in these markets by introducing Edge based computing which can allow maximum control for sensors and compatibility with IA upstream servers.Responsibilities – Director, Engineeringo Joined in 2017 in HPG group, led First ever Create development of IOTG as SoC Design Manager of Elkhart Lake PCH and took it from definition to successful PRQ. o Bringing in multiple firsts to meet diverse IOT market requirements e.g. Functional Safety, Out of Band manageability, multiple TSN, dedicated offload Sensor control subsystem. o Driven a distributed execution between Bengaluru and Hyderabad teams as ElkhartLake PCH Design Manager. It is a first ever successful PCH done outside Client PCH org.o Aligned with IP ecosystem to get the features incorporated in the existing IPs and worked to define the new IPs/Subsystem for the SoCo Led SoC execution including design, DFT, Val (Simulation, Emulation & post-silicon), physical design and timing/layout convergence to ensure product meet the needs of all IOT markets.

Jul 2017 - Jul 2021

Director Program Management

San Diego, Ca, Us

Next Generation Modem Chip development Qualcomm is a leader in mobile technologies and to maintain the leadership, here my role is to lead the development of next generation Modem Integrated Circuit (IC/Chip) which is going to fuel the mobile growth for 3G/4G/5G upcoming markets. Our objective is to provide the best-in-class battery life while ensuring excellent user experience with our solution.Responsibilities – Director, Program Managemento Started as ICE and promoted to Director Program Mgmt. and led team of 6 PMs responsible for all Qualcomm India SoC development, customer returns debug and chipset development. o Responsible for the timely tapeout of the Modem chip, meeting it’s required PoR targets. Started with 3G and did the last SoC for 5G (First 5G tapein!). Driven 5 PRQs in 6 years! Prided myself as MDMs held unique position to hold 100% market of the most famous smartphone brand!o Ensuring smooth handoff between various teams within India and other sites of Qualcommo Create communication channel to discuss key issues, change requests and to get alignment.o Provide visibility to executive management about the status of the program execution.

Jul 2010 - Jul 2017

Program Manager

Dallas, Tx, Us

1) Customer Handset Programs – OMAP34xx support (Jan 2009 – Jul 2010)Supported customer handset programs for OMAP34xx chipsets and successfully ramped High end smart phones based on Symbian and Linux, where we have enabled 720p record feature for the first time. Here I have managed the support from diversified teams situated in three continents. Helped in increasing the business engagement from one program to six programs in one year and paved the way for Android (Éclair) OS based mobile launch by an esteemed customer. First 6 years of TI provided me immense technical hand-on foundational experience on VLSI design.Responsibilities – Customer Program Managero Responsible for the successful phone ramps at customer end using TI OMAP product.o Negotiating customer requirements to ensure that their needs are met while optimizing investment from TI side.o Led development of three mobile phone programs Symbian, Linux and Android in parallelo Drive internal teams to deliver according to customer requirements.o Communicate customer view of program execution to senior management.2) SoC Program Management (OMAP) – 65nm Technology (Nov 2007 – Dec 2008)Responsibilities – IC Program Managero Responsible for the successful completion of the phase 1 of wireless multimedia accelerator full chip programo Single point of contact for various R&D teams, architects, and marketing teams spanning three different continentso Conduct periodic reviews to discuss key issues, change requests and to seek alignment.o Provide visibility to executive management about the status of the program execution.

Nov 2007 - Jul 2010

Ip Design Lead

Dallas, Tx, Us

Chip Design/Integration/Testing – 65, 90nm Technology (Apr 2004 – Nov 2007)Responsibilities –Design Lead/Integration Leado Led 12 members team to do the RTL, verification and physical design development of OMAP2 architectures in 90 nm and 65 nm technologies respectively.o Controlling the new change request, providing a plan to customers and supporting the existing silicon supporto Supported four IC development programs in two different technology nodes simultaneously.o Became MGTS in 2006 (TI’s recognized tech ladder title)o Defined the functional specification of System Level Control block.o RTL integration lead for SoC OMAP2430.

Apr 2004 - Nov 2007

Verification Engineer

Dallas, Tx, Us

IP/Subsystem Verification and Validation (Feb 2001 - Mar 2004)Here we worked on OMAP based IP’s and subsystem where the objective was to ensure that we make India center of TI seen as Verification Center of Excellence by ensuring that there is no bug/issue found post silicon from our IP’s.Responsibilities – Module Verification Engineero Defined the RTL verification strategy of various modules in development. o Defined a flow to generate multi-threaded application snippets to emulate device usage in real circumstances.o Definition of silicon test environment and test plan.o Emulated LCD screen using National Instruments Labview and booted WinCE in pre-silicon OMAP3 using Quickturn based Palladium Emulator

Feb 2001 - Mar 2004

Software Design Engineer

Chicago, Illinois, Us

Mobility Management Layer coding for EDGE phonesHere the project was to develop a protocol stack for EDGE phones, in which my responsibility was to work in the Mobility Management Team and develop various sections of the protocol. Did testing of mobility related codebase in Edge/2.5G stack. Despite short stint of 8 months, I successfully identified bug in ETSI/3GPP specification!

Jun 2000 - Feb 2001
Team & coworkers

Colleagues at Intel Technologies India

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1 education record

Naveen Agrawal education

  • Indian Institute Of Technology, Roorkee
    Indian Institute Of Technology, Roorkee
    Electrical Engineering
FAQ

Frequently asked questions about Naveen Agrawal

Quick answers generated from the profile data available on this page.

What company does Naveen Agrawal work for?

Naveen Agrawal works for Intel Technologies India.

What is Naveen Agrawal's role at Intel Technologies India?

Naveen Agrawal is listed as Director Of Engineering at Intel Technologies India.

What is Naveen Agrawal's email address?

AeroLeads has found 1 work email signal at @intel.com for Naveen Agrawal at Intel Technologies India.

Where is Naveen Agrawal based?

Naveen Agrawal is based in Bengaluru, Karnataka, India while working with Intel Technologies India.

What companies has Naveen Agrawal worked for?

Naveen Agrawal has worked for Intel Technologies India, Qualcomm, Texas Instruments, and Motorola India Electronics Ltd.

Who are Naveen Agrawal's colleagues at Intel Technologies India?

Naveen Agrawal's colleagues at Intel Technologies India include Dharavath Veeranna, Sandeep Patil, Venkatesha Gupta S N, Mahaveer Rajpurohit, and Praveen Ravipudi.

How can I contact Naveen Agrawal?

You can use AeroLeads to view verified contact signals for Naveen Agrawal at Intel Technologies India, including work email, phone, and LinkedIn data when available.

What schools did Naveen Agrawal attend?

Naveen Agrawal holds Bachelor Of Engineering - Be, Electrical Engineering from Indian Institute Of Technology, Roorkee.

What skills is Naveen Agrawal known for?

Naveen Agrawal is listed with skills including Omap, Soc, Physical Design, Rtl Design, Silicon, Ic, Power Management, and Silicon Debug.

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