Andy Carrasco
AeroLeads people directory · profile

Andy Carrasco Email & Phone Number

IC Package Design Engineer at Cisco
Location: San Francisco Bay Area, United States 7 work roles 2 schools
1 work email found @cisco.com LinkedIn matched
✓ Verified August 2026 4 data sources Profile completeness 100%

Contact Signals · 1 work email

Work email a****@cisco.com
LinkedIn Profile matched
3 free lookups remaining · No credit card
Current company
Role
IC Package Design Engineer
Location
San Francisco Bay Area, United States

Who is Andy Carrasco? Overview

A concise factual answer block for searchers comparing this professional profile.

Quick answer

Andy Carrasco is listed as IC Package Design Engineer at Cisco, based in San Francisco Bay Area, United States. AeroLeads shows a work email signal at cisco.com and a matched LinkedIn profile for Andy Carrasco.

Andy Carrasco previously worked as Technical Leader, Hardware Engineering at Cisco and Principal Package Engineer at Esilicon. Andy Carrasco holds Mba, Business Administration from Temple University Japan.

Company email context

Email format at Cisco

This section adds company-level context without repeating Andy Carrasco's masked contact details.

{first_initial}{last}@cisco.com
86% confidence

AeroLeads found 1 current-domain work email signal for Andy Carrasco. Compare company email patterns before reaching out.

Profile bio

About Andy Carrasco

Well-seasoned professional operating in the electronics and semiconductor industries, raised and educated as an engineer, designer, and businessman, specialized in high-tech development of hardware and software systems.• Experienced operator in the EDA software industry with significant background in strategic business planning, software development, and product design & development.• IC Package Technology & Design – Well versed in design methodology and manufacturing / assembly optimization of semiconductor packages and electronic circuits, and deep background in wide range of IC package & related technologies, including BGA, CSP, Leadframes, FlipChip, Stacked Chip, System-in-Package (SiP), TSVs, LEDs, 2.5D & 3D packages with Interposers / HBM.• Sales & Marketing – Proficient inside sales and technical sales background for customized IC package design services & software.• Business Development – Adept at business research & analysis, harvesting of customers in existing markets, and development of new and uncontested markets, with global experience at both large multinational companies and start-ups.• Customer Relationship Management – Engaging and charismatic presence in customer-facing roles and in product and services evangelism, including promotions at trade shows and events.• Prolific author of benchmarks, software and project specifications, technical papers, product descriptions, documentation & help manuals, tutorials & training curricula, and live / video demonstrations.

Listed skills include Cad, Semiconductors, Eda, Product Design, and 21 others.

Current workplace

Andy Carrasco's current company

Company context helps verify the profile and gives searchers a useful next step.

Cisco
Cisco
IC Package Design Engineer
AeroLeads page
7 roles

Andy Carrasco work experience

A career timeline built from the work history available for this profile.

Technical Leader, Hardware Engineering

Current

San Jose, Ca, Us

• Substrate development for high performance semiconductor packages

Feb 2019 - Present

Principal Package Engineer

San Jose, Ca, Us

• Implementation of high-speed & high-density high performance packages• IO Ring planning & breakout pattern development• Package feasibility, design trade-offs & resolution• Layout productivity methodology

Apr 2017 - Feb 2019

Sr. Ic Package Engineer

New Albany, In, Us

• Complex IC package design for high-speed telecommunications devices, optics-based packages, and SoC-based products• Co-design with signal and power integrity engineers• Manufacturing & assembly support, optimization, and failure analysis• New technology development for 2.5D substrate interposers• Design Review, package planning, 3D mechanical / assembly simulation• Design methodology development and package modeling/visualization

May 2016 - Apr 2017

Owner / Principal Design Engineer

• IC Package planning, substrate design, 3D modeling, focusing on complex or difficult to design projects• Toolset & interface development to power / signal integrity tools for development of high frequency applications• Manufacturing prep, fabrication and assembly optimization of electronic circuits and assemblies

Jul 2012 - May 2016

Chief Technology Officer / Product Manager

• Co-founded and helped establish company as a thought leader for the development of new technical visualization technology and product lifecycle improvements in the semiconductor industry• Developed technology roadmaps to achieve corporate strategic / financial goals and to monetize new company products• Designed, architected, and guided development of several highly acclaimed systems, including SSD (IC package mockup & planning), SSV (IC package simulation of manufacturing and assembly processes), and PCD (design software for massively large IC test products)• Successfully secured business contracts with several of the top global 10 semiconductor, OSAT (outsourced semiconductor assembly and test), and IC test companies

Apr 2009 - Jun 2012

Programming Department Manager / Software Architect

Nagase & Co., Ltd.

• Established and managed multi-national, multi-cultural software development team (Tokyo, Singapore, USA) to facilitate Design for Manufacturability initiatives at semiconductor companies• Authored and delivered technical papers at semiconductor industry events in Asia such as MIDA (Malaysian Investment Development Authority), MAP (International Workshop on Microelectronics Assembling and Packaging), ISSM (International Symposium on Semiconductor Manufacturing), and Nepcon (Electronics R&D and Manufacturing Technology Expo)• Played key role as member of technical staff to support software sales into 9 of top 10 semiconductor companies in Japan• Led international sales staff in Taiwan, Korea, and Singapore to record EDA sales in excess of $100,000 per license, with several high-end deals closed at $400,000-$500,000 per license• Oversaw excellent customer support operation in Japan and Asia, proven by AMC renewal rate over 90%

Jan 2006 - Mar 2009

Design Manager / Field Applications Engineer / Director Of Sales

Redwood City, California, Us

• Led electronics circuit design team to successful completion of over 200 design jobs, including personally completing over 100 designs in PCB, RF, Flex, Hybrid/MCM, and IC Packaging. Particular expertise was in complex, high pin devices, mixed technologies, 3D applications, and heterogeneous packaging applications• Designed and implemented novel training curricula for highly regarded, efficient training for complex software systems• Overhauled technical support collaborative operations to achieve response times within 1 hour and solution times within 24 hours• As member of software development team, designed and architected a number of custom software development projects in close collaboration with development partners and customers• Guided internal worldwide sales team and network of international distributors to record year-on-year revenue levels• As the de-facto corporate evangelist, authored numerous articles and presented technical papers at industry trade shows such as IMAPS (International Microelectronics Assembly and Packaging Society), DesignCon, Meptec (Microelectronics Packaging & Test Engineering Council), and Semicon West

Apr 1997 - Dec 2005
2 education records

Andy Carrasco education

Mba, Business Administration

Temple University Japan

Bachelor Of Arts (B.A.), Architecture

University Of California, Berkeley
FAQ

Frequently asked questions about Andy Carrasco

Quick answers generated from the profile data available on this page.

What company does Andy Carrasco work for?

Andy Carrasco works for Cisco.

What is Andy Carrasco's role at Cisco?

Andy Carrasco is listed as IC Package Design Engineer at Cisco.

What is Andy Carrasco's email address?

AeroLeads has found 1 work email signal at @cisco.com for Andy Carrasco at Cisco.

Where is Andy Carrasco based?

Andy Carrasco is based in San Francisco Bay Area, United States while working with Cisco.

What companies has Andy Carrasco worked for?

Andy Carrasco has worked for Cisco, Esilicon, Samtec Inc, Flexetch, and Nippon Sentia Co., Ltd..

How can I contact Andy Carrasco?

You can use AeroLeads to view verified contact signals for Andy Carrasco at Cisco, including work email, phone, and LinkedIn data when available.

What schools did Andy Carrasco attend?

Andy Carrasco holds Mba, Business Administration from Temple University Japan.

What skills is Andy Carrasco known for?

Andy Carrasco is listed with skills including Cad, Semiconductors, Eda, Product Design, Electronics, Pcb Design, Manufacturing, and User Interface Design.

Find 750M verified contacts

Search by job title, company, industry, location, and seniority. Export verified B2B contact data when you need it.