Andrew Read

Andrew Read Email and Phone Number

Principal Process Development Engineer at Finisar, Research and Development. Engineering evaluation of new products and processes @ Finisar Corporation
sunnyvale, california, united states
Andrew Read's Location
Castle Hill, New South Wales, Australia, Australia
Andrew Read's Contact Details

Andrew Read personal email

About Andrew Read

• Process Development Engineer with over 27 years’ experience managing improvements in the manufacture of nanotechnology, disruptive technology and cutting-edge devices.• Strategic approach to R&D. Focusing on development of entire system not just module, so that interactions can leverage features of the process or product to deliver enhanced performance.• Leader of cross-functional teams of scientists and engineers to create innovative solutions in research, development, and qualification of silicon manufacturing processes• Vast expertise in the semiconductor and manufacturing industry and specialist in process improvement, managing manufacturing area and yield improvement. Involved in the implementation and development of the MES (manufacturing executions system). Experience includes bottle neck management, SPC data collection and report generation for day-to-day monitoring and Quality Audits.

Andrew Read's Current Company Details
Finisar Corporation

Finisar Corporation

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Principal Process Development Engineer at Finisar, Research and Development. Engineering evaluation of new products and processes
sunnyvale, california, united states
Website:
finisar.com
Employees:
2251
Andrew Read Work Experience Details
  • Finisar Corporation
    Principal Process Development Engineer
    Finisar Corporation Sep 2021 - Present
    Sydney, New South Wales, Australia
  • Silanna Semiconductor
    Executive Manager Process Development
    Silanna Semiconductor Feb 2010 - Present
    Sydney, New South Wales, Australia
    Responsibilities• Take new ideas/concepts for process and products and test and develop same using internal wafer Fab and outsourced modules• Manage a team of scientists and engineers in the research, development, and qualification of silicon manufacturing processes• Form and lead cross-functional project teams in the research, development, and transfer to production of new or improved silicon manufacturing processes and devices• Contribute to the strategic planning and development of Silanna, plus part of internal Audit teamAchievements• ZQfet concept: Performed initial proof of concept experiments, built and tested transistors in our facility. Integrated full process and transferred process to a Korean Foundry for manufacturing. Items achieved include: o Integrated flow with existing Foundry modules where possible. o Design rule documents. Layout PDK and PCells for devices. o Test structure layout. Enabled the Silanna Power Division in San Diego to develop and sell products that enabled their customers to build world leading efficiency and power density DC-DC and AC-DC converters.• Developed PV cells on Transparent Sapphire substrates. This novel concept used minimal Silicon and produced a 22% efficient PV Single junction silicon cell under concentration. The results achieved met the Milestone target for the ASI Grant Silanna received.
  • Silanna Semiconductor
    Process Engineering Manager (Etch And Photolithography)
    Silanna Semiconductor Jan 2008 - Feb 2010
    Sydney, New South Wales, Australia
    Responsibility• Process engineering management of Photolithograph and Etch (ie: half the manufacturing processes)• Provided quality, well characterised, and maintained processes in the group to produce wafers in the Wafer Fabrication facility• Defined and directed process development work in accordance with overall company technological objectives• Drove yield improvement, cycle time reduction and tool uptime• Developed new process, product introduction and advanced process quality
  • Peregrine Semiconductor
    Process Engineering Manager (Etch And Photolithography)
    Peregrine Semiconductor Jan 2006 - Jan 2008
    Sydney, New South Wales, Australia
    Responsibility• Process engineering management of Photolithograph and Etch (ie: half the manufacturing processes)• Provided quality, well characterised, and maintained processes in the group to produce wafers in the Wafer Fabrication facility• Defined and directed process development work in accordance with overall company technological objectives• Drove yield improvement, cycle time reduction and tool uptime• Developed new process, product introduction and advanced process qualityAchievements• Streamlined MES system lot starts and report generation resulting in accurate and real time manufacturing data to be available. Introduced, documented, and trained staff in standard ways of dealing with engineering use and standard manufacturing, allowing WIP to be kept clean and reports generated to be accurate.• Optimised algorithms in MES system to manage lot queues through repetitive bottle neck tools to reduce process cycle time and keep line balanced resulting in improved on time shipment of wafers.• Produced PM and Periodic Check Dashboards. This allowed daily production meeting to anticipate upcoming and overdue checks and prioritise daily work appropriately. Dashboards also allowed Quality Audits to pass smoothly as activities were performed on time and easily visible.• Produced CpK Automated Reports. These reports focused on continuous improvement projects and supported old tool replacement activities.
  • Peregrine Semiconductor
    Section Head Photolithography
    Peregrine Semiconductor Jan 2003 - Jan 2006
    Sydney, New South Wales, Australia
    Responsibility• Managed Photolithography manufacturing area, including optical inspection in the wafer fab• Hired, trained and supervised junior engineer• Process up time, process yield• International and collaboration with other section heads• Drove team development projects, new products, and processes• Process integration
  • Peregrine Semiconductor
    Section Head Plasma Etch
    Peregrine Semiconductor Jan 2000 - Jan 2003
    Sydney, New South Wales, Australia
    Responsibility• Managed Plasma etch manufacturing area, including optical inspection in the wafer fab• Hired, trained and supervised junior engineer• Process up time, process yield• International and collaboration with other section heads• Drove team development projects, new products, and processes• Process integration
  • Idt - Integrated Device Technology, Inc.(Acquired By Renesas)
    Process Engineer (Plasma Etch)
    Idt - Integrated Device Technology, Inc.(Acquired By Renesas) Jan 1999 - Jan 2000
    Sydney, New South Wales, Australia
  • Quality Semiconductor
    Process Engineer (Plasma Etch)
    Quality Semiconductor Aug 1996 - Jan 1999
    Sydney, New South Wales, Australia
  • Awa Microelectronics
    Process Engineer (Plasma Etch)
    Awa Microelectronics Sep 1994 - Aug 1996
    Sydney, New South Wales, Australia

Andrew Read Education Details

Frequently Asked Questions about Andrew Read

What company does Andrew Read work for?

Andrew Read works for Finisar Corporation

What is Andrew Read's role at the current company?

Andrew Read's current role is Principal Process Development Engineer at Finisar, Research and Development. Engineering evaluation of new products and processes.

What is Andrew Read's email address?

Andrew Read's email address is an****@****ail.com

What schools did Andrew Read attend?

Andrew Read attended University Of Sydney.

Who are Andrew Read's colleagues?

Andrew Read's colleagues are Karen Puc, Dixie Cesar, Sharon Singh, Rick Niewoehner, Ng Joy, Hanif Zakaria, Alex Blecher.

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