Andrew Ahwal Email & Phone Number

Camarillo, Ca, Us

Culver City , Los Angeles , Us

During my brief period at Kernel, my role was to develop the infant ASIC test infrastructure. I directly worked under the CTO to design the testing infrastructure to bring their ASIC to mass production. This included directly interfacing with external vendors to help drive the entire effort. At Kernel, I was tasked in a very fast-paced environment to design an ASIC probe card test plan for 25C and 85C testing which included designing a dual-site probe card schematic. A summary of my responsibilities at Kernel is shown below:1. Worked in a fast-paced environment to bring up an infant ASIC testing environment which included coordinating directly with the CTO and external vendors for developing ASIC test infrastructure.2. Designed ASIC probe card schematics and probe solution test plan for 25C and 85C testing and then interfaced directly with external vendors to implement into production. 3. Developed ASIC control box PCB using Altium to interface between the ASIC and CHROMA3650.4. Used Jira to track, plan and coordinate all tasks needed to establish a structured testing environment. 5. Developed python code for benchtop module testing using VSCODE and Bitbucket to author, review and deploy code. Followed clean coding practices (Pylint and NumPy docstrings).

Lowell, Ma, Us

Working at MACOM I came in as the CHROMA3650 expert. My roles pertained to bringing four separate NPI ASIC products to mass production. This included developing test plans, test schematics, sockets/probe heads, and any additional needs for these subjects. At MACOM I designed many different on-board solutions to accomplish the many tasks that came up for testing high-frequency ASICS. During my later time at MACOM, I trained a new employee the CHROMA3650 ATE. This training included teaching him the basics of the CHROMA3650 environment how to design schematics and overall what is entailed in the life of a test engineer. A summary of my responsibilities at MACOM is shown below:1. Introduced and trained CHROMA3650 ATE test program architecture to a team transitioning into a new CHROMA3650 ATE environment.2. Managed all CHROMA3650 action items which included upgrading systems, creating documentation, and developing modular test structures to allow for a smooth transition. 3. Designed, implemented, and tested high-speed cost-efficient NRZ and PAM4 ATE load board designs for TIA’s, linear equalizers, and laser drivers for NPI products up to 32 GHz. 4. Incorporated third-party high-speed bench equipment such as Multilane ML4035 and Applicos PA72 into the CHROMA3650 test program architecture. 5. Trained and mentored entry-level test engineer for ATE NPI product line ranging from ATE test development to NPI production release.6. Worked extensively on the bench using an Anritsu VNA to analyze existing load boards to analyze s-parameters for correlation between ATE and bench.

Lowell, Ma, Us

At Nuvoton Technology Corporation America (NTCA), I am an ATE test engineer. My roles were to design and support testing solutions for audio product lines from tape-out to mass production using the CHROMA3650 and CHROMA3380P ATE platforms. I drove multiple audio codec projects, NAU8225 and NAU8315, for tier 1 customers with high quantity mass production and schedules. A summary of my responsibilities at Nuvoton is shown below:1. Designed ATE load board schematics and created layout guidelines for wafer-level testing (CP) and final test boards (FT) for CHROMA3650 and CHROMA3380P platforms.2. Prepared test strategy report documentation to outline test coverage and testing methodologies for each product line. 3. Coded mass production test programs in C/C++ for both wafer-level testing and final-testing solutions.4. Maintained released products in production which included updating yield efficiency, updating test coverage, and optimizing test programs for test-time reduction.5. Released multiple products to testing houses in Taiwan including ASECL, GREATEK, and Nuvoton in-house.6. Automated statistical analysis methodologies on test data sets to calculate mean, standard deviation, CPK, and generate graphical representations to determine if the data set is correctly tested and accurate.7. Implemented electrical distribution (characterization) test programs to verify at temperature corners and power supply voltage ratings meet datasheet specifications.

San Jose, Ca, Us

1. Led a lab of 20 students through lab tasks and assignments while providing individual help.2. Prepared teaching material for Digital Design Laboratory such as black-box testing, FSM design, etc.3. Educated students on basic TTL logic design using mixed logic notation.4. Instructed students on how to properly use logic analyzers, oscilloscopes, and digital multimeters.

San Jose, Ca, Us

1. Developed firmware for an ADXL362 Accelerometer and L3g4200D Gyroscope to interface with a 16-bit Microchip microcontroller.2. Developed PWM for Servo and stepper motor to interface with 16-bit Microchip series microcontroller.3. Developed code for a CMU image recognition camera to interface with a 16-bit Microchip series microcontroller.4. Developed ADC and DAC firmware to interface with a 16-bit Microchip series microcontroller.5. Developer SPI protocol firmware to interface with a 16-bit Microchip series microcontroller.

Engineer’S Degree, Computer Engineer

General Studies

High School, High School/Secondary Diplomas And Certificates