Angela Schmid Email & Phone Number

Menlo Park, CA, US

Manage cross-functional ASIC infrastructure programs covering a range of applications in Silicon Engineering and Hardware Acceleration from concept to production.

Santa Clara, California, US

• In my current role, to ensure the overall program's success, I oversee the Compute Express Link (CXL) performance validation program for upcoming data centers. In collaboration with important stakeholders, I establish.
• Fostered timely project delivery within challenging data center product roadmap.
• Developed cycle-accurate SystemC standalone model from ground up in adherence to performance requirements.
• Led successful project execution by mentoring a high-performing team, including one individual contributor and one intern.

Santa Clara, California, US

• In my former role, in order to increase productivity, I looked at RTL-level performance testing, located architectural bottlenecks, and suggested architectural changes for the product roadmap. I guided new engineers by.
• Constructed automation framework to test and elevate performance validation methodology across various products.
• Spearheaded a cross-functional performance validation program for Intel Primary Scalable Fabric (PSF) on client Intel platforms, by utilizing configurable SoC backbone in adherence to IOSF standard.

Santa Clara, California, US

• In this position, to improve workflows, I planned and oversaw the daily activities of a team of five application engineers. facilitated suggestions for effective performance in weekly meetings with engineers from.
• Optimized latest Intel client platform performance by incorporating customer feedback to align Intel's long-term roadmap with industry trends in cooperation with software vendors.
• Enhanced 3D scanning software applications (Sense and 3DMe) by using Intel RealSense technology to drive 3DSystems / Intel engineering engagement.

Santa Clara, California, US

• Lead a weekly Performance Monitoring Working Group consisting of Sr/Principal Engineers across organizations from different compute segments (Client, Server, HPC, Perforamnce Tools VTune/Linux Perf, and Architecture).
• Delivered enhancements & new features to the Performance Monitoring Roadmap on Intel platforms based on internal and external costumer requirements.
• Validated Performance Monitoring Events in Pre/Post Silicon enabling internal and external performance tools.
• Maintained Performance Monitoring documentation in the Software Developers Manual.
• Designed test plans, wrote pre-silicon tests in Intel assembly, debugged RTL, filed RTL bugs, and managed pre-silicon regression suite.
• Designed and implemented new pre-silicon testing methodologies for Hardware Performance events increasing validation coverage through the utilization of performance traces.

Santa Clara, California, US

As an Intern for Intel, evaluated the performance of hardware pre-fetching mechanisms on enterprise database workloads using a trace based simulator. Enhanced a software simulator to modify the various pre-fetcher configurations dynamically and evaluated the performance.

Mountain View, CA, US

As an Intern in the Platforms Group Angela built a thermal chamber for battery life cycle testing. The project involved PIC30 microcontroller programming and the design of a simple single layer PCB board.

As a build engineer Angela was responsible for build management, software versioning, bug tracking, application packaging, Install Shield programming, build scripting, and served as a liaison between departments.

Master Of Business Administration - Mba, Business Data Analytics

Master'S Degree, Computer Engineering

Bachelor Of Science (B.S.), Computer Engineering