An electronics engineer with 7+ years of experience working in the semiconductor industry and 1 year experience as an instructor in a review center. Has experience on both pre and post-silicon validation of integrated circuits. Knowledgeable in a variety of activities such as bench evaluation, behavioral modeling using Verilog-A, analog and mixed-signal simulation using Cadence Virtuoso and Synopsys Finesim tool and pre-silicon validation through FPGA emulation.