Angelo B. Email & Phone Number

all things low latency

County Dublin, Ireland

• System level design targeting latest and future Xilinx devices• Development of test designs for Xilinx implementation tools

Roma, Italia

• Design and development of signal processing systems for Software Defined Radios (SDR)

Noordwijk

On Board Computer and Data Handling Section, Data Systems Division Scientific mission supported by COST Action IC1103 MEDIAN. • Study of radiation and thermal stress effects on DRAMs data retention time.

Noordwijk, Paesi Bassi

On Board Computer and Data Handling Section, Data Systems Division • Design and development of a FPGA based DRAM test platform.• Study and characterization of DRAM data retention faults.

DediLab is a team of young engineers developing custom electronic products basedon Arduino, MSP430, ARM and FPGA.

Master'S Degree (Eqf 7), Electronics Engineering - Vlsi Systems Design, 110/110 Cum Laude

Thesis: Study of DRAM Data Retention Faults in DRAM Devices for Mass Memory Units Main areas of study: Microelectronics, Digital Hardware.

First Level Master Degree (Eqf 7), Electronics Engineering, Sound Engineering, 110/110 Cum Laude

Thesis: Moog Voltage Contolled Filter: Digital Implementation. Main areas of study: Digital Signal Processing, Acoustics, Analog devices.

Bachelor'S Degree (Eqf 6), Electronics Engineering, 105/110

Thesis: Microphonic arrays placement for sound sources localization in reverberating rooms. Main areas of study: Analog and Digital.

Diploma, Liceo Scientifico, 100/100 Cum Laude