Joined McAfee, as part of NanoSec acquisition, startup in Container-Focused Cloud Security Services across multi-cloud, zero-trust application visibility and security platform

Currently leading/working new release for new hardware development VTM1, functionality VT cross connect and DS3 mapping for customer requirement.Responsible for delivering software high level design document, platform software, SWDL/FWDL and manufacturing requirements. And this card is designed based on P2020 processor, new FPGAs and eMMC secondary storage.Worked on next generation Controller and Interface HW modules designed based on multi-core processor basically working on the Device driver, Bootcode and ENEA OSE BSP development for P2020(dual-core) and p2041(Quad-core processor) processor and also involved in platform software development for next generation cards.Responsibility and Deliverables involves…Development of Software High Level Design Document.Device drivers, Bootcode development involves Selector and (IPL) Initial program loader code.Enea OSE BSP development for various target boards designed based on MPC8548, P2010, P2020, P2040 etc.Also involved in Multi-core SMP software changes, Hardware bringup (Travelled to Fujistu Japan) and development of debugger target configuration/initialization file.Currently involved in Platform software development. And also involved in Engineer customer support activity and taking care of all the customer platform issues, intermediate development releases, cost reduction projects and sustaining activities.

Working on OTN (Optical Transport Network) edge access hardware, which is switching and aggregation box, which can switch the client traffic at rate of ODU0/1 capacity, where it has client supported rates are OC3/12/48 and OTU1 and OC192/OTU2 network interface. Where the hardware is 2U box, with two redundant Card designed based on the Motorola P2010 processor and OSE operating system.Developed the MOL(Managed object layer) software for the ODU0/1 cross connect and SNCP(sub-network connection protection) ME(Managed Entity) and also worked on the YPG ME. Where the MOL software interface with TL1 layer to parse down the TL1 command and provide the C++ class object, which implements DB interface, pre/post Dependency logic to qualify the ME operations supporting Create, Delete, Set and Retrieve etc. and interface to PEM/SIL layer, which is configuration/low level interface layer basically the device driver etc. Developed the Managed Entity object class for ODU0/1 cross connect, SNCP and YPGfor the MOL layer covering the TL1 commands (Domain support), operation and DB interface.

Diagnostics, Driver and Bootcode development for AMCC 440GP, AMCC 405EXr, MPC8536, MPC8641D and also responsible for developing the Diagnostics and Driver development for various ultra high density line modules and controller card in QNX operating system environment.Responsible for developing the front end based GUI Manufacturing tools developed in VB.net, in verify/checking the hardware.

Developing the bootcode/BSP software for the MPC8247 processorDeveloping the I2C Drivers interface access APIs for 2k CPU card having the Philips chipsets PC9538, PC9548, LM75A, and PCA8598CDeveloped and modified the driver to support new flash device S70GL01GN00, which has two 512 Megabit (S29GL512N) in a single 64-Ball Fortified-BGA package.And also developed the basic flash operation scripts for pre-programming the bootrom software, which includes read/write, sector protect/unprotect, and other device related operations.Developed the diagnostics for 500-2G card, which has the 24 10/100 FE ports and 2 GIG ports covering all the devices on the boardDeveloped the packet interface driver for AMCC 3450 Network processor i.e. basically the IDMA END driver, which processes the control packetAnd also supported manufacturing team providing diagnostics, bringing up the boards and also helped them in dealing hardware faults and debugging the boardTools/Platform: Coding done in C++ and C, visionProbeII EmulatorHardware : OptiFlow 500-2G platform

Joined Telsima part of Coriolis IP takeover and worked on Mutiservice provisioning platform like OptiFlow System Module in developing the bootcode, Board Support package and diagnostics for various cards.

Developing the bootcode for the Motorola PowerPC MPC8247, using the WindRiver visionProbe II and Metrowerks WireTap JTAG Emulator in developing the same.Developed the flash Driver for the Intel, AMD (am29LV128MH/L) and spansion (s29GL128N) Flash Devices.Developed the Drivers/Diagnostics for the TDM/Packet Modules. Tools/Platform: Coding done in C++ (with design patterns and OOAD for reusability) and CHardware: OptiFlow RT and COT

Joined Coriolis to explore the startup world, as Diagnostics Engineer, involved in developing the diagnostics and BSP(MPC8260) for OptiFlow system modules varied from data, TDM and switch modules.

Worked at Coriolis Networks a startup in Metro Optical Networking as Senior Design Verification/Development EngineerDeveloped device drivers, diagnostics for various TDM interface modules DS1, DS3, OC3 and OC12 and Data modules in RTOS environment using vxWorks OS.Developed the read/write drivers register access layer, component level drivers to verify the read/write accessibility to registers, FPGAs loader driver and device features testing drivers and Inter device testing drivers to cover the interrupts and functionality supported by the device. Developed the Diagnostics Assistance Test Tool (DATT) provide menu based and command line interface (CLI) for testing the device functionality, Inter device testing and finally the system level testing. Prepared test method specification used for testing and debugging, supporting hardware development group and manufacturing test process. Involved in software development process design, coding and testing. As part of diagnostics development, well understood and ported the vendor specific provided drivers into existing environment.Developed drivers and diagnostics for PMC-Sierra Framer and Line port interface device chip sets.And also involved in FPGA and ASICs design verification. Tools/Platform: Coding was done in C++ (with design patterns and OOAD for reusability) and CHardware: OptiFlow MSPP

After joining WIPRO Technologies, most of time was involved and worked on-site for client Lucent Technologies. During this period worked on Bandwidth Manager 2.5G, 10G and industry's first optical Switch in developing the bootcode, Factory System Software and also involed in fixing the MR issues.

on the LamdaRouter Release2.0 which is optical switch with higher capacity of 1260X1260 optical cross connect & Network restoration feature capability.Developed Boot code, diagnostics and drivers for PowerPC MPC8260 processor, layer 3 device called UTOPIA, YUKON STS-48 device and Hardware Integration Commands.Developed the processor POST diagnostics, memory and data path tests.And used the HP Emulator to test the Boot code.Tools/Platform: Coding was done in C, MPC8260 Assembly, Solaris and GreenHills Compiler.

The Optical Switch product does the optical cross connect i. e complete routing of optical input from one port to other port irrespective of payload. The system provides a Duplex 256 X 256 optical cross connect basic functionality, as it is pure optical switching using micro mirror technology.Worked as SENIOR SOFTWARE ENGINEER and was responsible for diagnostics development and testing of OPTICAL Switch product Lamda Router and worked on Release 2.0 Circuit packs.Developed the diagnostics for controller and switch cards.Prepared test design documents.Developed the Hardware Integration commands used for establishing the cross-connect through the system and for system level testing.Hardware : OPTICAL SWITCH (Lamda Router)Tools/Platform: Coding in the project was done in C on Solaris Platform, GreenHills Compiler.

The SONET Switching product BANDWIDTH MANAGER which does the basic switching at the rate of STS-1. The BWM System has three modules controller, Switch and I/O. The Controller controls the controller and switch module and I/O is having its own controller called Subrack Controller, which controls the Circuit packs in the I/O module. The 10G I/O modules OC192 port unit pack with PP192 provides 10 Gb/sec optical links. Worked as SOFTWARE ENGINEER and was responsible for diagnostics development and testing of SONET Switching product 10G I/O.Developed diagnostics (coding), testing the hardware, testing the individual Circuit pack features and product features.Developed HITE (Hardware Integration Testing Environment) Software Architecture and software requirement specification document.Also involved in HITE (Hardware Integration Testing Environment) Software Architecture and software requirement specification document.Developed the test design document for testing the circuit packsHardware : SONET BWM 10G I/O Frame.Tools/Platform: Coding in the project was done in C on Solaris Platform, GreenHills Compiler.

The SONET Switching product BWM (Band Width Manager) has three modules called Controller, Switch and I/O. The Controller module controls the whole product by providing the timing information and other control signals to the switch, whose basic functionality is switching at STS-1 rate. The I/O module provides the signal interface for different rate.Developed diagnostics for Controller and Switch modules.Tested the circuit pack functionality and product features. Developed Software Architecture Design for HITE (Hardware Integration Test Envirnoment) Software Tool.Prepared Diagnostics test procedure document.Tested DS3, OC3, OC12, OC48 port unit packs with real transmission through the circuit packs.Hardware : SONET BWM 2.5G I/O Frame.Tools/Platform : Coding was done in C on solaris platform, GreenHills Compiler

FSTS is Diagnostics Software used to check the functionality ofDifferent circuit pack, devices and features of the BWM SONET product. The communication to the Network Element is through the TL1 commands, which are the JAVA APIs.Developed the diagnostics for BSW and CSIEX (Controller Switch Expander) circuit packs. Involved in fixing MR (Modification Requests) solving and testing the product.Involved in generation of test cases.Developed the diagnostics test procedure document.Involved in testing of the complete BWM product.Hardware : SONET Switching BWM Universal Frame.Tools / platforms : Coding was done in C++ using OOP on Solaris, GreenHills Compiler

on Dialogic Corporation Inc DM3 boards, which are used in Computer Telephony. Computer Telephony allows the computer to make and receive, handle various communication media (such as audio and data) and make conversation between different media using the mediastream resources.The computer telephony resource developers use DM3 high-density architecture boards (PCI, cPCI, VME). The DM3 platform implementation (a baseboard, possibly with one or daughter board) for a particular system bus, along with the embedded software required to make the hardware operational. The DM3 board platform hardware includes Control processor, optional signal processor and other peripherals and it supports RTOS (VxWorks Operating System). The software modules called components are the executable entities, which resides on the processor.Developed APIs.Involved in simulation of Modification requests and fixing of bugs i.e. MR ( Modification Request)Developed test procedure documents.Involved in unit testing of software modulesHardware : Dialogic DM3 boards.Tools/platform: Coding was done in C on UNIX platform.

Rate Adapter finds application in the rate conversion from a rate of single stream, lower than ISDN and V-series rates called async rates to sync rates using CCITT Q.931 standard. The Software operates from the Data link layer. The Complete software has two main modules. - Module which converts async rate i.e. lower than the V - series rates to intermediate rates.- Module which converts intermediate rates to ISDN rates.Involved in unit testing of rate conversion function modules.Developed unit test design documents.Also involved in designing of test cases and executing the same.Tools/platform: Coding was done in C on UNIX platform.