Anthony Parent work email
- Valid
- Valid
- Valid
Anthony Parent personal email
- Valid
Innovative, solutions-driven Senior Design Automation Application Developer with 20+ years in the object-oriented development of software, tools and processes supporting the physical design of semiconductor devices. Solid expertise implementing Perl, Java, Cadence Skill routines, pcells, class libraries and CAD file manipulation tools, to streamline the design of analog cells and mixed signal blocks for large-scale chip development.
Retired
-
RetiredSouth Burlington, Vt, Us
-
RetiredRetired May 2024 - PresentWorking on hobbies!
-
R&D Engineer, Sr StaffSynopsys Inc Mar 2020 - May 2024Sunnyvale, California, UsSoftware development -
Eda Software EngineerInvecas Dec 2014 - Feb 2020EDA development and support
-
Senior Software EngineerIbm Jun 2008 - Dec 2014Armonk, New York, Ny, UsMember of the Noise and Timing, specializing in software quality, testing and results verification. Lead developer and software architect for comparative analysis engine to streamline qualification and release of other applications. Software quality lead for noise and electromigration (EM) tools.Key Accomplishments:- Designed, developed and supported a comparative analysis application to stress other applications and compare the results of multiple runs. Resultant comparisons are now required prior to release of several in-house applications. - Developed application to correlate spice simulations with in house noise tools.- Software quality leader for noise team. - Designed and developed tech-file generation application. Generating all electromigration related tech files from a single database.- Implemented a web-based electromigration calculator in conjunction with EM database engine.Environment: Perl, Java, Cadence Skill++, TCL, SQL, Make, Jenkins, Sonar, DevOpsMember of the layout automation team specializing in placement and extraction.Key Accomplishments:- Redeveloped a schematic driven relative placement engine from the ground up. Which reduced run times by over 50% and failure rate by over 75%. Increased capabilities for the support of SRAM and Array based layouts. Patent: “Method and System for Generating A Placement Layout of a VLSI Circuit Design”- Supported Steiner based extraction engine. Reworked parts to reduce run time by over 50 percent.- Developed application to allow semi-custom and memory designers to use a cell based 2.5d extraction engine in their design environment.Environment: Perl, Java, Cadence Skill++, TCL, Make -
Senior Member Of The Technical StaffAdvanced Micro Devices (Amd) Apr 2006 - May 2008Santa Clara, California, UsManaged a team of 5 Design Automation engineers in AMD’s Global CAD Infrastructure group distributed between Fort Collins CO and Austin TX sites. - Primary interface between CAD and Systems IT teams. - Technical lead for CAD Infrastructure team. - Primary infrastructure and IT support for new Fort Collins design center during first 3 months of initial site bring-up. - Projects include design data management, web based design dashboard development, software practices, software configuration management, and release management. -
Design Automation EngineerIntel Nov 2004 - Mar 2006Santa Clara, California, Us- Helped setup and evaluate Intel proprietary design tools. (Tcl, Bash) - Initiated analog design automation group to support mixed signal design engineers in the Itanium development group. -
Founding PartnerPegasus Design Automation Jul 2003 - Nov 2004- As principal Software Architect and Chief Technology Officer, directed all IT operations, including infrastructure design/administration and physical design software development.- Maintained Physical Design Kits (PDKs), providing semiconductor design engineers and mask designers with device-specific design rules & input files. - Supported software, developed new pcells & scripts and assisted users in debugging software tools.
-
Design Automation EngineerAmcc Nov 2001 - Jun 2003Santa Clara, Ca, Us- Directed software development, release and support for high-quality electrical design kits. Worked closely with IT to design and rollout the UNIX production environment and bring multi-site LSF in-house. Managed a staff of 3 Design Automation Engineers. - Primary architect behind the development and implementation of the physical design kits (PDKs), supporting a full front-to-back Cadence design flow, including symbols, models, pcells and Mentor Calibre runsets. - Managed the company-wide release, regression testing and distribution of design kits tagged in the CVS repository. -
Cad EngineerLsi Logic 1998 - 2001San Jose, Ca, Us
Anthony Parent Skills
Anthony Parent Education Details
-
University Of VermontElectrical Engineering
Frequently Asked Questions about Anthony Parent
What company does Anthony Parent work for?
Anthony Parent works for Retired
What is Anthony Parent's role at the current company?
Anthony Parent's current role is Retired!.
What is Anthony Parent's email address?
Anthony Parent's email address is an****@****ail.com
What schools did Anthony Parent attend?
Anthony Parent attended University Of Vermont.
What skills is Anthony Parent known for?
Anthony Parent has skills like Eda, Debugging, Physical Design, Software Development, Tcl, Unix, Asic, Testing, Vlsi, Perl, Semiconductors, Analog.
Free Chrome Extension
Find emails, phones & company data instantly
Aero Online
Your AI prospecting assistant
Select data to include:
0 records × $0.02 per record
Download 750 million emails and 100 million phone numbers
Access emails and phone numbers of over 750 million business users. Instantly download verified profiles using 20+ filters, including location, job title, company, function, and industry.
Start your free trial