Anusha Prakash

Anusha Prakash Email and Phone Number

Power, Noise and Reliability Specialist @ Apple
Anusha Prakash's Location
San Jose, California, United States, United States
Anusha Prakash's Contact Details

Anusha Prakash work email

Anusha Prakash personal email

n/a
About Anusha Prakash

Strong technical and business acumen in Power-Noise-Reliability space with hands-on experience in different SoC architectures operating in latest technology nodes. Skilled in working in a fast paced multi-customer-driven environment. Pre-sales and post-sales experience with several semiconductor companies.

Anusha Prakash's Current Company Details
Apple

Apple

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Power, Noise and Reliability Specialist
Anusha Prakash Work Experience Details
  • Apple
    Cpu Implementation Engineer
    Apple Jan 2020 - Present
    Cupertino, California, Us
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  • Ansys, Inc.
    Lead Application Engineer
    Ansys, Inc. Apr 2018 - Jan 2020
    Canonsburg, Pa, Us
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  • Ansys, Inc.
    Senior Application Engineer
    Ansys, Inc. Jan 2016 - Mar 2018
    Canonsburg, Pa, Us
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  • Apache Design Solutions
    Application Engineer
    Apache Design Solutions Feb 2014 - Jan 2016
    San Jose, Ca, Us
    - Responsible for Power integrity, Signal integrity analysis and debugging on IC's using Apache's Totem (Analog and Mixed Signal Design, IP's and memories) and Redhawk (Digital Design). - IC chip reliability (electromigration) analysis on state-of-the-art (16nm and 20nm) IC designs.- Hands-on experience in complete ASIC Design flow, SPICE simulations, providing customer support and validation of EDA tools.
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  • Stony Brook University
    Research Assistant
    Stony Brook University Jun 2013 - Dec 2013
    Stony Brook, Ny, Us
    Development of an EDA Tool to generate SPICE netlists from gate-level descriptions of ISCAS-85 benchmark circuitsGuide: Professor Dr. Emre SalmanDescription: The inputs of this tool include the gate-level netlist of a benchmark circuit and a target standard cell library. The tool generates a GDS file of the benchmark circuit and outputs a final SPICE netlist that has the extracted physical impedances. The interface between the transistor-level netlist, placement, and routing tools is achieved through Perl scripts.
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Anusha Prakash Skills

Vlsi Cadence Virtuoso Fpga Verilog Asic Vhdl C Modelsim Cadence Eda Perl Cadence Schematic Capture Synopsys Tools Simulations Rtl Coding Ic Layout Digital Circuit Design Low Power Design Rtl Design Mixed Signal Integrated Circuit Design H Spice C/c++ Rtl Verification Circuit Layout Cadence Spectre Cadence Virtuoso Layout Editor Systemc Synopsys Design Compiler Perl Script Ubuntu Nanotechnology Systemverilog Altera Quartus Computer Architecture Pspice Ic Station Totem Redhawk Hardware In The Loop Verification Red Hat Linux Active Hdl C++ Pathfinder Reliability Thermal Analysis Account Management Managing Business Growth

Anusha Prakash Education Details

  • Stony Brook University
    Stony Brook University
    Electrical And Electronics Engineering
  • Global Academy Of Technology
    Global Academy Of Technology
    Electronics And Communication Engineering
  • Mes Kishore Kendra
    Mes Kishore Kendra
    Pcmb
  • Sri Vani Education Center
    Sri Vani Education Center
    High School

Frequently Asked Questions about Anusha Prakash

What company does Anusha Prakash work for?

Anusha Prakash works for Apple

What is Anusha Prakash's role at the current company?

Anusha Prakash's current role is Power, Noise and Reliability Specialist.

What is Anusha Prakash's email address?

Anusha Prakash's email address is an****@****sys.com

What is Anusha Prakash's direct phone number?

Anusha Prakash's direct phone number is +140845*****

What schools did Anusha Prakash attend?

Anusha Prakash attended Stony Brook University, Global Academy Of Technology, Mes Kishore Kendra, Sri Vani Education Center.

What skills is Anusha Prakash known for?

Anusha Prakash has skills like Vlsi, Cadence Virtuoso, Fpga, Verilog, Asic, Vhdl, C, Modelsim, Cadence, Eda, Perl, Cadence Schematic Capture.

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