Anusree Bhattacharjee Email & Phone Number

Bengaluru, Ka, In

Bangalore

• Implementation and Unit Testing of Synchronous Ethernet feature for upcoming PTX800GE Platform. (Present)• Development, Unit Testing and Bug fixes for the feature (PTP) G.8275.1 profile over LAG (link aggregation group) interfaces for ‎PTX10001-36MR platform.• Diagnostics support for one of the ACX series platform.• Alarm infrastructure implementation for evo (C++ based) platforms.

Bengaluru Area, India

- Development of control loop application for optical power control engine for Gen2 optical Mux Module to inter operate with latest gen4 optical cards in multi threaded environment-Design and Development of Auto Discovery framework o Infinera line system has Auto discovery mechanism to detect the Neighbor card attached through fiber with self. The node controller validates the detected card for all set of compatibility and once succefull the two cards make a pair for transmitting the Optical signal o Did re-design the entire framework for componentizing and making it scalable and easily extensible o Used Object Oriented design patterns to design plug-able and easy to extend software.- Designed and developed passive devices for ILS line module to routing module interconnect

Bengaluru

Work at HP:o OST: Open Storage plugin development for Symantec NetBackup to use HP Storage devices (D2D and B6200) Platform: Windows Language: C++ Role:• Development and enhancement for OST2.0 which supports HP StoreOnce B6200 backup device.• Bug fixing and Coordination between QC and development team.• Was on Maternity leave for 9 months.

Bengaluru Area, India

-Acknowledgements:Paper on “Coverage and Profiling for Real-Time Tiny Kernel” (https://ieeexplore.ieee.org/document/5577998) is selected for 7th IEEE International Conference on Embedded System and Software, at University of Bradford, participated in the conference for that paper presentation at University of Bradford, UK.Received Spot Award for the Paper acceptance at IEEE.- Work at Samsung:o Code Analysis Solution: Enabling Coverage and Profiling Feature for Real-Time Tiny Kernel  Platform : Linux Language : C Role:• Ported GNU coverage tool GCOV and profiling tool GPROF available for Linux OS to Real-Time tiny kernel uC/OS-II which has lot of restrictions compare to Linux and specially no File System Support.• Introduced Function level coverage and profiling feature for GNU GCOV and GPROF tools and established significant reduction in memory footprint when used with Real-Time kernel.• Enabled Coverage and Profiling features for Samsung proprietary Real-Time OS.o Card Simulator Framework: Framework for conformance testing and design verification for SD/MMC/UHS-II/UFS protocols.  The project has two part, one is windows backend application communicates with GUI and Network Manager of windows side, and Linux application runs at Target Board and send commands to the SD/MMC devices and communicate with Network Manager Linux side. The windows and Linux application communicates through socket communication. Another part of the project is to communicate with SystemC model of SD/MMC/UHS-II/UFS. Platform: Windows XP, Linux Language: C++ Role:• Windows backend application. Developed the main control logic SCL (System Control Logic).• SCL creates SD/MMC Manager ad SD/MMC Manager creates SD/MMC Device object to manage concurrent TestSuite execution for SD/MMC device.

Bengaluru Area, India

Acknowledgement: Winner of Perl coding contest at Interra Systems. Received Spot Bonus at Interra System for the work in the project Carbon SATA Transactor.Worked in the following projects at Interra Systems:o Carbon-SRIO Transactor (Transactor design for Serial Rapid I/O Protocol). Platform : Linux Language : C, C++ Role:• Pin level interface• SERDES (Serializer & Deserializer)• High level software transactions in terms of IO Logical or Message Passing logical layer packets.• Added support for prioritized transactions i.e., high priority transactions are sent before low priority transactions• Example of the transactor in SystemCo Carbon-SATA Transactor (Transactor design for Link Layer of SATA Protocol ) Platform : Linux Language : C, C++ Role:• Conversion of Transport Layer compatible transaction packets to Link Layer compatible format.• Speed up simulation by bypassing SATA serial interface and connecting directly to the 10 bit encoded parallel interfaces for both transmit and receive channels.• Link layer features like Flow control, Scrambling, CRC, 8/10 bit encoding• Documentation in d-oxygen compatible format.o TI-Smart-Sight (Tool for measuring power, leakage and area of a soc) Platform : Windows, Eclipse Language : Java Role :• Owner of “SMARTSIM” (Simulation Engine of Smart-Sight)• Enhancement & bug fixing.• Re-architecting the Simulation Engine.o Added support to force continuous waveforms on signalso Design the engine interfaces to ensure backward compatibility, maintainability and scalability.o Dynamic and leakage power calculation.o Verilog Netlist Parser(Internal Project) , Platform : Linux Language : C++ Role:• Populating the OM of a simple verilog netlist & decompiling the OM in an output verilog file.

Bachelor Of Technology (Btech), Electronics And Instrumentation Engineering, 89.2%

University Topper

Higher Secondary Examination, 82.2