• First Degree Teaching Assistant for the course Analog & Digital VLSI Design• Responsible for conducting weekly labs, designing questions and helping students understand the implementation of MOSFET-based multi-stage operational amplifier circuits on Cadence Virtuoso

• First Degree Teaching Assistant for the course Computer Architecture• Responsible for evaluating 300+ students on the implementation of MIPS-based processors in Verilog and C++

Teaching Assistant for the BCS ZC311 Basic Electronics course offered as a part of the B.Sc. Computer Science degree offered by BITS Pilani on Coursera.

• First Degree Teaching Assistant for the course Microelectronic Circuits.• Responsible for conducting weekly labs, designing questions and helping students understand the implementation of MOSFET-based amplifier circuits on Cadence Virtuoso

• Part of the SerDes IP Design team, working on Dual Charge Pump-based PLLs in Intel's i18A PDK.• Responsible for verifying and checking Proportional & Integral Charge Pump-based Phase Lock Loop Circuits.• Modeled and simulated Type 1 and Type 2 PLLs in Verilog-A using Cadence Virtuoso tools.

• Developed an STT MTJ compact model for MRAM with NGSPICE, meticulously validating and enhancing its accuracy through several read/write circuit simulations. • Optimised model computation time by reducing the number of simultaneous equations being solved. Advisor - Prof. Tanmoy Pramanik, Assistant Professor, IIT Roorkee

• As part of the communications around the key app Payvider, developed components of the marketing stack in conjunction with the product manager – these included tutorial videos, storyboard, FAQ documents and an operation manual. • Used design tools to help improve and optimise the product process flow design and UI/UX design to upgrade the user onboarding process for the application to be launched.