Arnaud Charton Email & Phone Number

Livermore, Ca, Us

Mountain View, Ca, Us

Sunnyvale, Ca, Us

Milpitas, Ca, Us

Fremont, Ca, Us

Joined the team at an early stage of development, was instrumental in the design and integration of the protocol on chip, went through multiple revisions of the silicon. Experienced the entire life-cycle of the product, from definition, feasibility/architecture, design, integration, test, customer acceptance, maintenance, RMA, and backward/forward compatibility.Worked on the SW architecture, HW/SW partitioning for the Central Office chips. Reviewed ASIC specs.Designed and implemented from scratch the Layer 2 protocol, the SNR monitoring, the inter-processor interface, the Rx path driver, ...Defined requirements for a new Chip to support Vectoring, Line synchronization and crosstalk cancellation. Proposed solutions to reduce cost, and improve system performance and stability.Implemented in C the VDSL/VDSL2 protocol layers, state machine FSM, Algorithm interface, Message packing/unpacking, ... drivers such as ISR handler, timer, memory handler, ASIC interface...Designed in assembly the code for an in-house 16 bits micro controller. Wrote a translator from assembly to C to help debug and do regression testing.Created a tool to integrate the whole SW stack, a C simulation of the HW, Algorithms and vxWorks on UNIX.Integrated the system on silicon to reach production quality. Used Oscilloscope, logic analyzer, spectrum analyzer, debugger and event log tools to debug critical problems. Faced and fixed a wide range of issue from Cache, wild pointers, ASIC, Memory leak, controlled and uncontrolled crashes,...Was the Core Modem Team Manager (5 persons on site, one abroad) 1.5 year hands on. As technical manager, guided seasoned engineers on design and debugging issues. Managed the SW development of a CO (Central Office) chipset, from architecture definition to mass production. Planned SW development phases to minimize post silicon development time.

Philips Semiconductors (VLSI), CA - CDMA (IS-95) chipset.Developed the Sleep Mode controller which performs a Slow clock calibration, switches on/off the RF, DSP and CPU, and handles the master time correction at wake up. The challenge is to stay synchronized with the network (within 4us) using a low cost crystal oscillator and to compensate for deviation.Debugged, optimized and completed the Slotted mode, L1C, Multiplex sub-layer, and the timer modules. Integrated the firmware with the chip. Modified the boot code, the interrupt table (ARM assembly)... Used logic analyzer and scope to show and localize hardware problems. Debugged a jittery timer task. Made performance analysis (% of CPU consumption per thread) for the different modes of operation.Four days training at the CDMA Wireless Academy, five days on software project management.

Amsterdam, Noord-Holland, Nl

- Lead the User Interface team (6 Engineers) to incrementally develop a high quality graphical UI.- Provided technical guidance on design, how to find & solve bugs, how to optimize… and code review.- Assigned tasks, tracked progress and planned deliveries.- Defined next generation software architecture.- Set up the development process with the ClearCase administrator.- Supported customer product acceptance on site (Seattle WA ; Bogota Columbia ; Tel-Aviv Israel).- Wrote in C the LCD driver and the Short Message Service (SMS) memory management.- Designed and implemented in C the "Windows" manager which displays the application on a dot matrix LCD and handles the keyboard inputs, the editors, the proportional fonts, 18 languages as different as English, Chinese, and Hebrew...- Integrated the UI on the target and reviewed the code for optimization (the size of some functions were divided by 3).