Arthur Lin Email & Phone Number

San Diego, California, US

• Directed technology and foundry development, significantly enhancing device performance and production efficiency for SOI/BCD/Power MOS/GaN/SiC/UHV CAP/Ga2O3.
• Spearheaded collaborative efforts with design, marketing, and operation teams, selecting cost-effective and high-performance solutions that bolstered company product lines and market positioning.
• Innovated high-density chip designs, improving performance and reliability from a comprehensive technical perspective.
• Develop and release technical documents (PDK/SPICE/DRC/LVS, etc.) to improve design efficiency
• Work with foundry for new test chip and product tape out to ensure first time success
• Define/design layout test structures and DOE corner lot for the process to evaluate and qualify for the device/process/models/reliability

Malta, NY, US

• Led BCD project development and team management for LV/HV/UHV projects, delivering platforms that ranged from 3.3V to 700V, contributing to mass production releases and customer success in design wins. Developed and.
• Project management and coordination, direct technology and resource planning activities, define and drive technology improvement and enablement roadmap, manage/coach/develop engineers
• Co-work with Product Line Marketing, Model, QRA, ESD, PDK, IP, ETEST, UMD groups to provide well design service for customer
• Support customers MPW and NTO design win (choose the proper IP and DRC clean to meet foundry process requirement)
• Address customer’s concerns and provide the solution to ensure first time success
• Provide training and technical solution to customers

Hsinchu, TW

• Managed and executed multiple LV/HV/UHV project developments, pioneering the release of industry-leading high-voltage and SOI-based processes.Being the first among global semiconductor foundries to release for.
• Project management and coordination
• Co-work with Marketing, SPICE, RA, ESD, PDK, IP, WAT groups to provide well design service for customer
• Support customers MPW and NTO design win (choose the proper IP and DRC clean to meet foundry process requirement)
• Address customer’s concerns and provide the solution to ensure first time success
• Provide training and technical solution to customers

Hsinchu, TW

• Contributed to 90nm and 65nm CMOS process development, focusing on device physics and process optimization through comprehensive analysis and testing
• Test pattern design, WAT data collection and analysis.
• Failure analysis by DOE.

Degree Of Master In Finance

Degree Of Master In Mechatronic Engineering