Arul Ramalingam Email & Phone Number

Fremont, Ca, Us

San Francisco, California, Us

I am responsible for leading and managing the end-to-end development of compute and network hardware engineering teams, overseeing the architecture, system requirements, design, development, project management, verification, validation, and implementation of cutting-edge hardware solutions.Collaborating closely with cross-functional teams and ensuring seamless alignment with the broader organization’s goals.

San Francisco, California, Us

Aligned my team’s efforts with business objectives to consistently deliver high-quality products.Formulated the technical strategy, defined product roadmaps, and ensured product quality and compliance while effectively managing project timelines and budgets. Recruited top talent, mentored emerging leaders, and fostered a culture of innovation in hardware design. Ensured strict adherence to industry standards, cultivated strong relationships with external vendors, and regularly provided senior leadership with updates on project progress, challenges, and risks.

San Francisco, California, Us

-Leading a team of XFN Engineers and responsible for a bunch of critical components/functions of AV-Working on Architecture, System Design and Development for multiple modules

Santa Clara, California, Us

• Products: 7500/7500R (Data Center Switches/Routers)• Worked on high-end data-center switches/routers, designed fabric cards, linecards, multiple test modules and additional cards needed for modular switches• As a team leader, worked with cross functional team, delivered products on time and within budget.• Integral part of core SI team which laid foundation for 25G NRZ & 56G PAM4 designs across Arista products• Designed products with various high speed interfaces like 56G PAM4, 25G NRZ, XFI, SFI, 10G Base-T, 10G KR, FCoE, etc• Worked on architecture, lead cross functional teams in HW design and development, diagnostics development, compliance testing (EDVT, MDVT, ODVT, EMI/EMC, etc)

San Jose, Ca, Us

• Products: Nexus 5000/2000/IOM’s (Data Center Switches/Fex’es/Servers)• Worked on high-end data-center switches/fabric extenders and IOM card for the Servers• Product design included various high speed interfaces like XFI, SFI, 10G Base-T, 10G KR, FCoE, etc• Responsible for architecture support, HW design and development and executing extensive Cisco testing methodologies including EDVT, MDVT, ODVT, Compliance, etc

• Products: Smart Core (Enterprise/Mobile Back Haul Solutions)• Design and development of Ethernet line cards and the necessary IOM cards with 10/1G SFP ports along with sustaining the older generation products.• Responsible for architecture support, HW design and development, executing EDVT, ODVT, Compliance testing and also responsible for chassis integration and testing.

Espoo, Southern Finland, Fi

Working on multiple Optical Network Termination (ONT) Units for GPON. These ONT's provide triple play services (Video, Voice and Data).

Bangalore, Karnataka, In

Served as a design consultant, project manager, and technical specialist for several of Wipro’s key clients, including Alcatel-Lucent, Calix, and others.Led and contributed to all stages of product design, from initial concept through to final implementation.Built and managed a cross-functional team of 10+ engineers in the development of complex Access and IPDSLAM products, overseeing the entire product lifecycle, from conceptualization to manufacturing release.Ensured products met stringent environmental standards and were designed to operate on both AC and DC power supplies, with the capability to run in low-power mode on battery backup.Held full responsibility for system architecture, requirements definition, hardware design and development, and validation of designs through rigorous testing methodologies to ensure alignment with customer specifications.Key Products: ONT, MDU (Consumer Electronics), Ethernet Line & Aggregation Cards (Enterprise).

Chennai, In

Refined the logic, optimized timing, and floor-mapped a custom 32-bit RISC processor on a cutting-edge multi-million gate FPGA. Designed and developed a standalone desktop computer utilizing this proprietary RISC processor. Accountable for hardware architecture, design, development, and testing.Products: Desktop Computer using Custom 32 bit RISC CPU