Arun S Email & Phone Number
Who is Arun S? Overview
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Arun S is listed as Senior Product Application Engineer - PrimeTime STA at Synopsys Inc, a with 28438 employees, based in Bengaluru, Karnataka, India. AeroLeads shows a matched LinkedIn profile for Arun S.
Arun S previously worked as Engineering Manager & Senior Lead Technical Specialist - CAD/PDK at Intel Corporation and Senior Lead Technical Specialist - CAD/PDK at Intel Corporation. Arun S holds Master Of Engineering - Meng, Microelectronics And Vlsi System Design from Ms Ramaiah College.
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About Arun S
CAD/PDK Engineering Manager and Senior Technical Lead Engineer working in Intel Foundry currently driving multiple technical contributors to a common department goals and integrated accomplishments. Own complete EM/IR tool PDK platform enablement for Intel internal & Intel External Foundry customers. Having hands on experience in front end circuit verification domains such as analog/digital characterization tools and flows, RC parasitic extraction tools and flow support - deep dive debug and route causing, Custom RV (EM/IR) tool/flow support, ASIC/Digital RV (EM/IR) in depth tool enablement in new process nodes, Spice golden reference for ASIC/Digital EM/IR tools, version to version tool/CAD qualification, Top EDA vendor platform in ASIC RV - Ansys Redhawk-SC & Cadence Voltus, PERC rule deck validation platform in parallel three top EDA vendors - new enablement, extensive experience in CAD tools qualifications and driving strategic initiatives in team.Currently expanding into multi die 3DIC Reliability Validation (EM/IR), simultaneous multi die analysis in RV analysis at leading edge technology.Working on Intel Foundry Industry standardization of High Voltage Electrical Overstress checks for both Synopsys and Cadence platform offering - Moving from conventional PERC based topological voltage propagation to Industry standard tools like Synopsys CCK & cadence spectre High voltage checks.
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Arun S work experience
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Engineering Manager & Senior Lead Technical Specialist - Cad/Pdk
Senior Lead Technical Specialist - Cad/Pdk
Lead Technical Engineer working in Intel Corporation currently driving multiple Technical Contributors to common team goals and integrated accomplishments. Having hands on experience in front end circuit verification domains such as analog/digital characterization tools and flows, RC parasitic extraction tool and flow support - deep dive debug and route cause, Custom RV tool/flow support, ASIC RV in depth tool enablement in new process nodes, Spice golden reference for ASIC RV tools version to version qualification, Calibre PERC rule deck validation platform - new enablement, extensive experience in CAD tools qualifications and driving strategic initiatives for my team.
Senior Cad Design Automation Engineer
Worked as a Senior CAD Design Automation Engineer working on Custom Circuit Reliability Validation Tool flow. Resolving Tool flow issues in Reliability Sign off for Custom designs. Along with this, was responsible for Custom and ASIC Layout ESD resistance sign off tool flows.
Senior Cad Design Automation Engineer
Worked on CAD DA Role for RC extraction in Custom and ASIC designs. Was part of the larger Intel Custom Foundry team. Handled CAD DA RC extraction issues for a group of 100+ design engineers in both Analog IP, memory IP and ASIC Test chip/Product teams. Along with RC extraction, was in charge of Analog IP char tool flow + CCSN noise model generation for memory instances. Noise char modelling tool used were Liberate, Nanotime and Si Smart.
Cad Design Automation Engineer
Design Automation and CAD tool Engineer working on Analog IP Timing Characterization for both In house and external Characterization Tools. Played a key role in evaluating Cadence Liberate and SiSmart Char Solutions for Analog IP char for Intel.
Post Graduate Intern Technical At Intel - Cad
Worked on Internal Intel Power Grid Analysis Tool Research and development under Sriram Mysore - Ex Principle Engineer, Intel.Developed an algorithm to bucketize the ASIC instances based on timing window switching activity and decision making on highest activity time of design block working for identifying worst case window for IR drop/Reliability analysis.
Colleagues at Synopsys Inc
Other employees you can reach at synopsys.com. View company contacts for 28438 employees →
Jessie Torregroza
Colleague at Synopsys IncSunnyvale, California, United States
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Jonathan Almanza Batres
Colleague at Synopsys IncGuadalajara, Jalisco, Mexico
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Karan Shah
Colleague at Synopsys IncIndia
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Do Hyun An
Colleague at Synopsys IncCoquitlam, British Columbia, Canada
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Nandini Mukherjee
Colleague at Synopsys IncBengaluru, Karnataka, India
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Paris Martinez
Colleague at Synopsys IncAustin, Texas, United States
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Carlyle Chen
Colleague at Synopsys IncHsinchu City, Taiwan, Province Of China
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Jeff Morrison
Colleague at Synopsys IncSan Jose, California, United States
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Dave Otero
Colleague at Synopsys IncCary, North Carolina, United States
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Ramnath Velu
Colleague at Synopsys IncSan Francisco Bay Area, United States
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Arun S education
Master Of Engineering - Meng, Microelectronics And Vlsi System Design
Bachelor Of Engineering - Be, Electronics And Communications Engineering
Frequently asked questions about Arun S
Quick answers generated from the profile data available on this page.
What company does Arun S work for?
Arun S works for Synopsys Inc.
What is Arun S's role at Synopsys Inc?
Arun S is listed as Senior Product Application Engineer - PrimeTime STA at Synopsys Inc.
Where is Arun S based?
Arun S is based in Bengaluru, Karnataka, India while working with Synopsys Inc.
What companies has Arun S worked for?
Arun S has worked for Synopsys Inc and Intel Corporation.
Who are Arun S's colleagues at Synopsys Inc?
Arun S's colleagues at Synopsys Inc include Jessie Torregroza, Jonathan Almanza Batres, Karan Shah, Do Hyun An, and Nandini Mukherjee.
How can I contact Arun S?
You can use AeroLeads to view verified contact signals for Arun S at Synopsys Inc, including work email, phone, and LinkedIn data when available.
What schools did Arun S attend?
Arun S holds Master Of Engineering - Meng, Microelectronics And Vlsi System Design from Ms Ramaiah College.
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