• Enhanced location-based experiences for Snap’s AR Spectacles 4 device, by providing the ability to obtain the absolute heading, using on-device sensor fusion. Work included design and implementation of an Android SDK based, heading computation algorithm, with device-specific adaptations for the Spec’s sensor coordinate system, and sensor events retrieval method. Work also included research of Mag calibration alternatives and development of additional, native-code-based implementation, for integration with next-gen device.• Analyzed core issues in system power consumption of next-gen AR Spectacles. Work included setting up system power & performance monitoring infrastructure, comparing sysfs settings and system power measurements with previous Spec’s generation and working together with EE / thermal teams to identify most effective solutions, while updating power model estimations.• Optimized the core, OpenCV Universal Intrinsics based, stereoscopic depth-map extraction algorithm, to run on low-power, AR Spectacles 4 device, while being able to achieve the required RT performance. Optimizations included maximized CPU ARMv8 NEON SIMD usage, multi-threaded execution, core-affinity setting and better utilization of build option flags.• Accelerated RT depth extraction algorithm performance by offloading its sky-detection DNN-based computation to DSP. Work included integrating a new, quantized, multi-class segmentation model, for enabling DSP DNN inferencing, and SIMD-based optimization of both DNN scores’ arg-maxing and retrieval of sky-segmentation scores/labels maps.• Designed and developed proprietary tools and monitoring metrics for enabling on-device profiling of RT depth extraction on Spectacles 4, supporting both algorithm optimization/acceleration and refine/re-design efforts. Profiling metrics included RT performance, CPU utilization, power consumption, thermals and output quality verification.

• Updated the DSP vector-extensions-based, RT Bokeh image refocus module to support latest 64-bit compliant SDK version; Work included DSP runtime vs. power optimization. 
• Optimized, enhanced and implemented the core, ARMv7 NEON based, stereo matching cost aggregator and disparity selector module – a main building-block of the proprietary stereoscopic depth map algorithm, driving Corephotonics’ digital Bokeh SW library. Optimizations included maximized SIMD usage, multi-threaded execution, and reduced memory access & footprint. Enhancements included dynamic disparity range support, and repetitive pattern mask generation. 
• Designed and implemented the speckle detector module, based on connected-component algorithms, allowing identification and removal of disparity image speckles, with respect to occlusions / caged-areas. 
• Tracked down legacy Bokeh library errors derived by OpenCV compilation issues, re-defined a new, in-detail, OpenCV Android build-procedure, which resolved those issues, removed legacy workarounds, and allowed future support of new platforms / compilation-modes.

• Designed and developed the core, MulticoreWare® x265 / UHDkit™ based, SW-only video encoding module for Imagine's next-generation compression products line; this component is capable at real-time HEVC encoding of live 4Kp60, 10-bit, HDR10+ (with dynamic metadata), YUV 4:2:2 content.• Conducted an extensive meta-research, applying Vision Science principles and models of the Human Vision System as framework for quantitative / inter-dependency analysis of the different quality features for Imagine’s next-generation video encoding solution; research contributed both in building a solid knowledge-base and in identifying feature-subsets, that could fold possible market / product use-cases.• Conducted a market research for selecting Imagine’s next-generation video encoding solution (targeted for several future products), capable at real-time HEVC encoding of live, Ultra High Definition (UHD) resolution, High Frame-Rate (HFR), 10-bit color sample, Wide Color Gamut (WCG), High Dynamic Range (HDR), YUV 4:2:2 Chroma sub-sampling content. Managed video algorithm team’s interface with selected vendor.

• Designed and developed the core, Intel® Media SDK based, video transcoding and processing modules for Imagine's Selenio™ One XO compression platform; this product is a high-density, enhanced video quality, Adaptive Bitrate (ABR) / linear transcoding solution for Over-The-Top (OTT) multiscreen applications and IPTV, supporting MPEG-2, H.264 and HEVC video.• Applied NUMA and NUMA I/O affinity management modifications in order to optimize performance and achieve maximal platform density results for Imagine's SelenioNext™ transcoder product.

• Designed and developed the core, OpenMAX™-based, video decoding and rendering modules for Avaya's next-generation desktop video collaboration product; these modules supply the product's video engine with an interface to the platform H.264 AVC HW Decoder and Renderer. Designed and developed many other product features such as adding the product's video engine with H.264 SPS parsing capabilities in order to support video resolution change notifications, etc.• A member of the feature quality team for Avaya's next-generation desktop video collaboration product. Managed video team interface discussions with new product's platform vendor.• Development of Avaya Desktop Video Device™ – an Android-based video desktop collaboration endpoint; work included design and integration of product quality enhancements such as using a dynamic, Encoder-side, adaptive intra refresh period, as packet loss recovery strategy; adjusting rendered image dimensions to fit the displayed aspect ratio, etc.

• Designed and developed, from new algorithm research to full implementation, of the core video scaling module for the next-generation video conferencing product, based on Intel® Core™ i7 platform.• Design and development of various components in the video DSP layer, which supplies transcoding, transrating, video processing and distribution services, in H.263 / H.264, for Scopia Elite™ - Radvision's high definition video conferencing product.• Development for multi-core platforms, based on complex hierarchical memory architecture, with interfaces to the video codecs and OS (caching, multi-dimensional DMA, uni/multi-cast, multi-core sync etc.).• Managed group's integration tasks both internally and with other groups within the company.

• Design and development of the Progressive Download services for the DVR Metadata Indexer component, which produce and store dynamic information during Record, and use it during Playback to supply video indexing (time/content based) and conditional access control.

• Designed and developed a Media Streaming engine for digital video recorders, which resides in the lowest SW layer and supplies Live, IP-streaming, Playback and Record services in MPEG-2 / MPEG-4. • Development of a multi-threaded SW, with interfaces to the drivers' level and OS.• Integration work with other company teams locally and overseas.

• QA of SCADA / HMI software for supervision and control of complex industrial processes.