Senior Design Engineer
CurrentResponsible for FPGA design of video processors handling a high number of 4K video streams for video aggregation, scaling, overlay, mixing, and delivery over 100Gbit Ethernet to monitors within stadium, governmental, house of worship, educational and other environments.• Designed modules for a large scale video processor allowing for up to 72 4K video stream inputs of SDI/HDMI/Display-Port video drawn on to an 80Mega-pixel canvas for processing and display.• Integrated Software Defined Video over Ethernet (SDVoE) solution into video processing product for delivery of aggregated high speed video channels over 100Gbit Ethernet• Integrated Professional Media over Ethernet (SMPTE 2110) solution into video processing product for delivery of aggregated high speed video channels over 100Gbit Ethernet.• Developed/integrated multiple video processing units such as: deinterlacer, color space converter, chroma converter, gamma correction, color correction, genlock, HDR processing, SDI, HDMI, Display-Port. Cores all supporting 4K video at 12-bits precision.• Developed processing blocks for interfacing to Altera Avalon streaming bus, Xilinx AXI streaming/control bus• Developed embedded processor code using Altera NIOS processor, Xilinx Microblaze processor• Designed FPGA core implementing an embedded ARM processor system with Xilinx Zynq FPGA