Arash Shakeri

Arash Shakeri Email and Phone Number

System Architect at  @ Apple
Arash Shakeri's Location
Santa Clara, California, United States, United States
Arash Shakeri's Contact Details

Arash Shakeri personal email

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About Arash Shakeri

Leadership Skills:• Managing and delivering complex products in consumer electronics, gaming, and wearables. • Directing and coordinating all aspects of product delivery: program management, industrial design, mechanical and electrical design, prototyping, manufacturing, testing ,certification, NPI and GTM • 9 year of Technical leadership experience overseeing the work of a team of engineers in HW system development• Vendor relations experience which resulted in successful development of several custom ICs, touch panels, LCDs, Batteries, connectors, as well as mechanical parts tooled and machined • Outstanding interpersonal and communication skillsTechnical Skills:• 12+ years of systems architecture and PCB design experience leading projects from concept to production • Extensive experience with HDI, rigid-flex, and dynamic FPC boards with blind and buried vias and complex electromechanical considerations • Proven ability to improve processes, gross margin, and product reliability• Fundamental knowledge of mechanical and product design concepts• Design, bring up, and debug experience with DC/DC power supplies, mixed signal HDI circuits, SOC, PMIC, and analog circuits • Cadence tools: Concept, OrCAD, Constraint Manager, Allegro, and Virtuoso design environment for analog circuits design and simulation• Hands-on experience with electronic testing equipment: Oscilloscopes, Electrometers, Network Analyzers, Protocol and Logic Analyzers, and Function Generators

Arash Shakeri's Current Company Details
Apple

Apple

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System Architect at 
Arash Shakeri Work Experience Details
  • Apple
    System Architect
    Apple Mar 2020 - Present
    Cupertino, California, Us
    Watch
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  • Samsung Strategy And Innovation Center
    Sr. Principal/Head Of Hardware Engineering/Sr. Director/Principal/Director
    Samsung Strategy And Innovation Center Mar 2014 - Mar 2020
    Ridgefield Park, Nj, Us
    • Manage all the HW, product, and mechanical development activities for the digital health group under regulatory considerations and FDA process (60601-x-x)• Select, negotiate with, and manage sub-contractors and contract manufacturers involved in development and manufacturing of the products, reference platforms, and modules• Provide technical review and oversight on the development of all sensor sub-systems including custom build sensors for the product• Provide technical direction to engineering teams working on development and validation of various biometric sensors including PPG arrays, ECG, BioZ, and GSR• Interface with and coordinate all the vendors (components, manufacturing, tooling, design services, environmental testing, and certification) to ensure on time delivery of solutions and products• Manage and coordinate all the NPI activities including contracts with overseas manufacturing, budgeting, forecasting, and logistics• Recruit, develop, and maintain talent in hardware, mechanical, and validation engineering roles
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  • Nvidia
    Product Architect
    Nvidia Feb 2013 - Mar 2014
    Santa Clara, Ca, Us
    • Led the design team providing technical oversight on all the engineering efforts for Nvidia's first major consumer product Nvidia Shield (http://shield.nvidia.com/store/portable) with specific focus on all the user facing sub systems• Authored several RFQs including custom LCD and custom Touch Panel and camera module. Negotiated with all the major LCD, Touch panel, and camera module manufacturers to select the right solution• Participated in definition, architecture, and execution of Project Shield • Provided top level summaries to management while influencing product level decisions • Interfaced with internal teams: platform, mechanical, software, and Tegra SOC as well as external vendors such as LCD and touch manufacturers driving resolutions to challenges and issues • Audited the cost and performance of sub designs to ensure they remained in alignment with the competitive niche they were intended to occupy
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  • Amd
    Member Of Technical Staff (Mts) Analog Design Engineer
    Amd Oct 2011 - Oct 2012
    Santa Clara, California, Us
    • Designed and implemented power aware circuits for the IO blocks to ensure glitch free operation regardless of power up sequencing (TSMC28nm)• Designed AMD’s next generation GPIO receiver blocks with innovative high voltage tolerances (GF28nm)• Redesigned the power sniffer blocks increasing detection threshold with minimal area and power penalty
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  • Amd
    Senior Staff (Smts)/Mts/Senior Electronics Design Engineer
    Amd Mar 2007 - Oct 2011
    Santa Clara, California, Us
    • Provided technical leadership and oversight and was responsible to deliver several concurrent projects from enthusiast (high margin) to mainstream (high volume) products• Recipient of AMD’s Spirit of Success Award (the highest award given to an individual contributor) for delivering Eyefinity technology to market• Architected and delivered a cross functional project ( GPU Star Dust) which enabled GPU platforms to use a CPU purposed tool speeding up power delivery path characterization• Represented Platform team in cross functional meetings where high level decisions were made• Supervised and mentored team members ensuring consistency and quality across projects• Led GPU platform in tool alignment and consolidation with CPU team. This resulted in adoption of cost estimation techniques by the CPU team, as well as GPU teams’ adoption of CPU schematics design tools and processes
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  • Nvidia
    Technical Lead/Senior/Engineer2 System Design Engineer
    Nvidia Jul 2002 - Feb 2007
    Santa Clara, Ca, Us
    • Actively participated in the entire NPI cycle from creating specifications, architecture and design of the board, BOM creation, and bring up. Also supervised board qualification and production release.• Served as Lead Design Engineer for multiple graphics boards, ranging from value segment 4 layer boards to high end enthusiast 12 layer designs• Designed and qualified cost effective SMPS and LDO power supplies for various platforms• Recognized as one of the most cost conscious designers leading many projects to completion under budget and ahead of schedule contributing to better than forecasted gross margins
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  • Cisco
    Co-Op System Design / Hardware Verification / Software Verification
    Cisco Sep 1999 - Dec 2001
    San Jose, Ca, Us
    • Designed test boards, developed and synthesized Verilog code on Xilinx FPGA (Virtex II), and developed Perl scripts and Verilog code as test and functional models for two ASICs in development• Designed and implemented a Multicast test system incorporating IP/TV technology.• Completed training in: Deep Knowledge in Verilog Synthesis, Specman Elite, TCP/IP technologies, Fiber Optics, IXIA, and SMATBITS packet generation training
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  • Citibank Canada
    Co-Op Lan/Wan Technical Specialist / Desktop Support Specialist
    Citibank Canada May 1998 - Apr 1999
    New York, New York, Us
    •• Deployed and maintained the bank’sLAN/WAN systems, multi-protocol routers, repeaters, hubs, and encryption devices.• Designed and implemented a virtual Token Ring network to provide redundant mainframe connectivity• Attended training in: Cisco VPN, EcoScope network monitoring utilities, MS Access, and Microsoft SMS
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Arash Shakeri Skills

Debugging Asic Fpga Semiconductors Verilog Hardware Architecture Soc Computer Architecture Embedded Systems Pcb Design Signal Integrity Microprocessors Pcie Vhdl Electronics Processors Analog Circuit Design Rtl Design Vlsi System Design Ic Mixed Signal Orcad C Static Timing Analysis Logic Synthesis Xilinx Cadence Systems Design System On A Chip Functional Verification Systemverilog Schematic Capture Microcontrollers Logic Design Tcl System Architecture Product Development Circuit Design Program Management Cross Functional Team Leadership Design For Manufacturing Electrical Engineering Team Management Electronics Manufacturing Product Launch Npi Npi Management Supply Chain Management

Arash Shakeri Education Details

  • University Of Waterloo
    University Of Waterloo
    Computer Engineering

Frequently Asked Questions about Arash Shakeri

What company does Arash Shakeri work for?

Arash Shakeri works for Apple

What is Arash Shakeri's role at the current company?

Arash Shakeri's current role is System Architect at .

What is Arash Shakeri's email address?

Arash Shakeri's email address is a.****@****ung.com

What is Arash Shakeri's direct phone number?

Arash Shakeri's direct phone number is (800) 726*****

What schools did Arash Shakeri attend?

Arash Shakeri attended University Of Waterloo.

What skills is Arash Shakeri known for?

Arash Shakeri has skills like Debugging, Asic, Fpga, Semiconductors, Verilog, Hardware Architecture, Soc, Computer Architecture, Embedded Systems, Pcb Design, Signal Integrity, Microprocessors.

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