Ashish Parmar

Ashish Parmar Email and Phone Number

Lead Product QA Engineer at Amazon @ Amazon
Ashish Parmar's Location
Sunnyvale, California, United States, United States
Ashish Parmar's Contact Details

Ashish Parmar personal email

n/a

Ashish Parmar phone numbers

About Ashish Parmar

OVERVIEW:• 11+ years of experience working with software, firmware, testing and factory assembly line of electronic devices.• Lead, drive and own projects, prepare work schedule, test plans, release sign-off docs and performance metrics.• Manage resources, triage bugs, give presentations, work with vendors, customers and cross-functional teams.• Do manual/automation testing, create/modify test scripts, do failure analysis, assign tasks and review reports.• Currently on H1B Visa with approved I-140. Open for on-site/remote job, domestic and international traveling.TECHNICAL SKILLS:• Software tools: Jira, Confluence, Testrail, Jenkins, Concur, Bugzilla, Git, Eclipse IDE, Keil, Microsoft Office• Operating systems: Mac OS, Windows, Linux• Languages used: Python, Ruby, C, C++• Lab equipment used: Digital oscilloscope, DC power supplies, multi-meters, soldering station, frequency generator, AC grid simulator, solar array simulator, power meter and tools (cutting, striping, crimping, etc.)CONTACT:• ashishvparmar@gmail.com

Ashish Parmar's Current Company Details
Amazon

Amazon

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Lead Product QA Engineer at Amazon
Ashish Parmar Work Experience Details
  • Amazon
    Lead Product Qa Engineer
    Amazon Apr 2018 - Present
    Seattle, Wa, Us
    • Build release owner for testing of Echo Frames (Android, iOS). Work with TPM, PM, SW developers and factory to prepare list of features for testing, decide on timelines, create test plans, test cases and test runs.• Involve early on with UX and PM team in new feature development, understand the requirements, create/update test cases & automation test scripts, identify and arrange resources needed to meet deadlines.• Collect team performance data, create statistics and graphs to provide insights in quarterly business review.• Identify risks in product launch, attend meetings to gather/provide updates and generate weekly test reports.• Assign regression testing tasks to team associates/contractors, review their results and identify any gaps.• Perform manual/automation feature testing, raise Jira issues, follow-up with developers to resolve them, watch production tickets, repro issues and capture logs, do failure analysis and triage tickets.• Mentor interns, decide on their projects, guide them, take full-time interviews and train new joiners.• Build and maintain multiple lab automation testbeds, arrange and wire devices to minimize troubles in testing.• Prevented re-work of ~900 manufactured devices (2 weeks of manual effort) and unblocked production line at factory in China. Performed sample testing on packed devices, modified assembly line test steps, duplicated a test station to double the speed and added another check to catch failures early on.• Achieved cost reduction of $4600 in development of rigs by visiting vendors’ site, re-use old components, and resolve their concerns. Worked with SDETs to properly calibrate the rigs and performed stress testing. • Saved 45-50 hours of manual regression time by optimizing test cases and reducing total test cases by ~24%.• Arrange domestic/international shipments, create technical shipping docs & do sanity testing before shipping• Developed user friendly python flashing script, created multiple flash stations
  • Enphase Energy
    Sr. Firmware Qa Test Engineer
    Enphase Energy Feb 2015 - Apr 2018
    Fremont, California, Us
    • Designed and developed microcontroller and power relay based GFI (Ground Fault Interruption) prototype board and housing body for system safety in compliance with NEC Article 690 and UL-1998 standard. • Provided in-person technical training for 3 days to 12 people in India to build a new team and explain different generation of products, how to use web portal, build a solar power system and give the practical demo.• Visited customer’s site to understand field issues, answered the queries of vendors and explained how solar power production works during shadows. Also, contributed in rooftop installation.• Worked on all phases of product life cycle – concept, design, development, testing, deployment & maintenance• Owner of testing for and 6th/7th Generation micro-inverters for North America, Europe, Australia and India, consisting of Advanced Grid Functions, Zero Export, Solar power production, Storage and Energy management. • Created test plan, test suites, test cases, built regression smoke testbeds, created presentation deck for compliance certification and wiring diagram. Performed black box, white box, ad-hoc and regression testing.• Created and modified automation Ruby scripts for testing micro-inverter’s functionality.• Responsible for keeping smoke testbed up and running all the time, monitor regression test results, perform failure analysis, find issues, file JIRA bugs and follow-up until resolution.• Worked closely with developers and cross-functional teams to fix issues at prior stage of compliance testing.
  • San Jose State University
    Instructor Student Assistant
    San Jose State University Oct 2014 - Dec 2014
    San Jose, Ca, Us
    Provided personal tutoring to students, taught them basic concepts of high-speed digital systems, helped them in learning Cadence SigXplorer tool, graded mid-term test papers and guided the students in their projects.
  • Synaptics
    Firmware Engineer Intern
    Synaptics Jun 2014 - Oct 2014
    San Jose, California, Us
    • Considering different use cases of smart phone users, implemented and tested wake-up gestures (double-tap, shapes, alphabets) and multiple finger touch functionality (using C/C++) for mobile touch screens.• Worked on code development and optimization, resolving JIRA issues, trouble shooting, finding redundancies and prepared statistics for memory utilization of the firmware code.
  • Pmc-Sierra
    Esd Product Development Intern
    Pmc-Sierra Jan 2014 - May 2014
    Us
    • Performed DVT (Design Verification Test) of storage boards for applications with interfaces like PCIe Gen3, SATA.• Carried out measurements of timing characteristics (set-up, hold time), circuit impedances and eye pattern analysis.• Created RAID memory arrays and executed I/O tests in temperature controlled chambers.
  • San Jose State University
    Instructor Student Assistant
    San Jose State University Oct 2013 - Dec 2013
    San Jose, Ca, Us
    Provided tutoring to students, helped them in learning Cadence SigXplorer tool, taught basic high speed timing concepts like different types of skew, jitter, reflections, etc., how to analyze measurement results, how to generate design guide and reviewed their projects.
  • Mangal Camtronics
    Assistant Engineer And Coordinator
    Mangal Camtronics Jun 2011 - Jun 2012
    • Designed micro-controller (At89s52, At89c2051) circuit for CNC machine controller. Developed code in 8051 assembly, contributed in PCB designing and testing various circuit boards. • Managed resources, trained them for greater productivity, created work schedules and resolved their issues.• Reduced re-work time by 45% by adding review stage in assembly line, thus increasing productivity.• Created sales quotations, purchase orders, invoices, maintained stocks, handled packaging and shipping. • Followed-up with vendors for timely delivery of raw material and interacted with customers.
  • Accenture Services Pvt. Ltd.
    Associate Software Engineer
    Accenture Services Pvt. Ltd. Jun 2010 - Jun 2011
    Dublin 2, Ie
    • Worked with customers/users across the globe to resolve their access related issues and problem tickets.• Gave presentation to a group of 200+ people on SAP Security Roles/Procedures and trained new employees.• Assisted the team in creation and maintenance of users/work roles in SAP systems, resolving tickets, extracting system reports, creating performance metrics, and updating work trackers on the share-point.
  • Bhabha Atomic Research Center
    Intern
    Bhabha Atomic Research Center Dec 2006 - May 2007
    Contributed to the team in carrying out blood tests, soldering components, performing mathematical calculations, preparing metrics for the project ‘Non-invasive Hemoglobin Test using photo-plethysmography’. Also did physical blood test of people to create a small database for comparison of the results of blood test done with the new non-invasive hemoglobin test probe. Computed the differences between the two results and prepared a report with graphs in excel.
  • N.C.C. Telecom Pvt. Ltd.
    Intern
    N.C.C. Telecom Pvt. Ltd. Jun 2005 - Nov 2005
    Performed quality check of EPAX systems, active voice terminals, video door phones and security display units. Assembled circuits, repaired EPAX slave cards and prepared documentation of technical problems in slave and master cards and their solutions.

Ashish Parmar Skills

Eclipse C C++ Eagle Pcb Sap Basis Pspice Vhdl Embedded Systems Microcontrollers Sap Computer Architecture Pcb Design Vlsi Integrated Circuit Design Testing Simulations Perl Scripting Embedded Linux Linux Kernel High Speed Circuit Design Team Leadership Project Management Multitasking Skills Written And Oral Presentation Skills C++ Language Coding Languages Signal Integrity Perl Linux Verilog Device Drivers Microprocessors Arm Cadence Sigxplorer High Speed Interfaces Firmware Programming

Ashish Parmar Education Details

  • San José State University
    San José State University
    Computer Engineering
  • Vivekanand Education Society'S Institute Of Technology
    Vivekanand Education Society'S Institute Of Technology
    Electronics Engineering
  • Shri Bhagubhai Mafatlal Polytechnic
    Shri Bhagubhai Mafatlal Polytechnic
    Industrial Electronics

Frequently Asked Questions about Ashish Parmar

What company does Ashish Parmar work for?

Ashish Parmar works for Amazon

What is Ashish Parmar's role at the current company?

Ashish Parmar's current role is Lead Product QA Engineer at Amazon.

What is Ashish Parmar's email address?

Ashish Parmar's email address is pa****@****zon.com

What is Ashish Parmar's direct phone number?

Ashish Parmar's direct phone number is +170777*****

What schools did Ashish Parmar attend?

Ashish Parmar attended San José State University, Vivekanand Education Society's Institute Of Technology, Shri Bhagubhai Mafatlal Polytechnic.

What are some of Ashish Parmar's interests?

Ashish Parmar has interest in Photography, Listening To Spiritual Discourses, Trekking, Meditation.

What skills is Ashish Parmar known for?

Ashish Parmar has skills like Eclipse, C, C++, Eagle Pcb, Sap Basis, Pspice, Vhdl, Embedded Systems, Microcontrollers, Sap, Computer Architecture, Pcb Design.

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