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Experienced high performance design engineer specializing in FPGAs with ASIC experience. Many firsts in Graphics, SDR, and HFT.I AM the reason that the competition's trades are coming in second.
Spartak Trading
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Director Of Fpga EngineeringSpartak Trading Sep 2024 - PresentConfidential
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Garden LeaveMyself May 2024 - Sep 2024World, Free, OoTraveling. Ask me about China, Switzerland and Iceland -
Fpga EngineerBelvedere Trading, Llc Jun 2022 - May 2024Chicago, Il, UsDeveloping FPGAs for trading infrastructure. -
Senior Fpga Engineer 2Cruise Jan 2021 - Jun 2022San Francisco, California, UsHelping to make self driving vehicles a reality!Zynq MPSOC development - cameras, ECC & batting cleanup. Timing closure and master of SPAM.Learning Linux kernel drivers on the job. -
Fpga EngineerAllston Trading Oct 2016 - Dec 2020Developed FPGA exchange parsersDeveloped FPGA based orderbooks, both level and order basedMicrowave link interface designs to maximize utilization and first to transmitTiming closure for multi-SLR designs running at > 350Mhz
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Senior Fpga EngineerSpacex Sep 2015 - Sep 2016Hawthorne, California, UsDid my part to help make humanity an interplanetary species."SpaceX is like Special Forces… we do the missions that others think are impossible. We have goals that are absurdly ambitious by any reasonable standard, but we’re going to make them happen. We have the potential here at SpaceX to have an incredible effect on the future of humanity and life itself." — Elon Musk Fun things I work on: Highly reliable space based commercial FPGAs (parameterized SECDED encoding/ decoding, TMR, radiation effects) -
Senior Principal EngineerAccolade Technology Dec 2014 - Dec 2015Franklin, Massachusetts, UsFPGA Design and Architecture for multipart 10G/100G ethernet packet inspection.Developed high speed packet parser to strip MPLS and VLAN tags.Developed 100G IDLE packet generator for LR4 & SR10.http://accoladetechnology.com -
Senior ScientistBbn Technologies Oct 2011 - Dec 2014Delivered 4 channel Zynq SOC FPGA based SDR in a little over a year. The SDR utilized an ADI 9361 and custom RF.Drove the architecture and implementation by leading a team of 4 design and verification engineers.Experience with AXI interconnect and architecture.Implemented overlap and save based correlation for FFT based preamble detect based on Zadoff-Chu sequence. Designed FSK, QBPSK mod/ demod, Reed Solomon. Worked closely with software on device driver development.Research into Quantum superconducting cache design based on eSFQ logicdesigned 2048 tap floating point 2D FIR filterSuccessful development of CPU PCBC, openCL and MATLAB modeling of preamble sequence and modem architecture
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OwnerSilicon Spectrum 2003 - Apr 2014Incorporated company to sell FPGA based graphics accelerator cores based upon Number Nine IP licensed from holding company. Redesigned IP to be a fully synchronous and safe design. Experience with floating point math including multiply, divide and addition. Drove sales by attending tradeshows and conferences to demonstrate IP in operation.Experienced with PCI, PCIe, 2D/3D graphics, math pipelines, Ethernet, ARM AMBA interfaces, DDR/DDR2/DDR3 designs.
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Principal Fpga Engineer/ Fpga LeadCobham 2007 - Oct 2011Christchurch, Dorset, GbFormerly MA/COMLead FPGA Engineer for Cobham SR&DArchitected, designed, verified FPGA switch fabric for Next generation software defined radio system.Team lead for 6 FPGA design/ DV engineers. -
Principal Asic EngineerAnalog Devices 2006 - 2007Wilmington, Ma, UsImproved the design flow for low power metering ASIC by converting hand instantiated logic into synthesizable Verilog and implementing a fully automated P&R flow. Introduced low power methodologies such as clock gating and scan across power/ clock domains. UPF flow from RTL to tapeout. -
Senior Applications EngineerSynopsys 2004 - 2006Sunnyvale, California, UsDrove SystemVerilog usage amongst Synopsys customers in the Northeast by demonstrating Synopsys’ lead in embracing the language. Improved customer utilization of Synopsys tools increasing sales. Supported customer tapeouts for 65nm designs by demonstrating tool capabilities in low power design and Primetime multi corner analysis. -
Principal Asic EngineerAppliedmicro 2000 - 2002Santa Clara, Ca, UsArchitected GFP Framer/ DeFramer chipset and stand-alone device. 400Mhz framing operation and 311Mhz Deframing. Designed efficient re-usable store and forward FIFOs. Ported OC12 ATM to OC48 opertion. -
Principal Asic EngineerEllacoya Networks Inc. 1998 - 2001UsArchitected and led design of three router expansion ASICs. Led FPGA Design effort for new router design. Gate level debug of vendor high speed PLL lock detect circuit. -
Principal Asic EngineerNumber Nine Visual Technology 1994 - 1998Architected and designed major portions of High Speed, High Gate count Graphics Processors including pixel and texture caches, IEEE floating point units (Add, Multiply and Reciprocal) and 3D operations. Responsible for Synthesis, floor planning and Static Timing Analysis.
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Senior Engineer 2Bae Systems 1992 - 1994London, GbASIC/ VHDL go-to guy.Designed 60K gate ASIC for F22 EW program.System simulations, synthesis, debug.
Frank Bruno Skills
Frank Bruno Education Details
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Tufts UniversityElectrical Engineering -
UdacityComputer Engineering
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Tufts UniversityElectrical Engineering
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Northeastern UniversityComputer Engineering
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Southern New Hampshire UniversityBusiness Administration
Frequently Asked Questions about Frank Bruno
What company does Frank Bruno work for?
Frank Bruno works for Spartak Trading
What is Frank Bruno's role at the current company?
Frank Bruno's current role is Director of FPGA Development at Spartak Trading, Ex-SpaceX, Ex-Cruise, Author and Digital Design Guru.
What is Frank Bruno's email address?
Frank Bruno's email address is fb****@****ons.com
What is Frank Bruno's direct phone number?
Frank Bruno's direct phone number is (603)-836*****
What schools did Frank Bruno attend?
Frank Bruno attended Tufts University, Udacity, Tufts University, Northeastern University, Southern New Hampshire University.
What are some of Frank Bruno's interests?
Frank Bruno has interest in Science And Technology.
What skills is Frank Bruno known for?
Frank Bruno has skills like Fpga, Asic, Systemverilog, Verilog, Debugging, Soc, Integrated Circuit Design, Vhdl, Static Timing Analysis, Xilinx, Processors, System Architecture.
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