江家浩 Email & Phone Number

[2024~] Engineer @ ITRI1. Application of deep learning in DAS.2. Optimization of model inference with CUDA, ROCm, and Triton.***[Master Thesis] Climate Downscaling: A Deep-Learning Based Model of Heterogeneous Precipitation Data in Regional Strong Climatic Forcing AreasWe proposed a deep convolutional neural network with skip connections, attention blocks, and auxiliary data concatenation, in order to downscale the low-resolution precipitation data into high-resolution one. We also compared with other climate downscaling methods and show better performance in metrics of Mean Absolute Error (MAE), Root Mean Square Error (RMSE), Pearson Correlation, structural similarity index (SSIM), and forecast indicators. ***[2023/09~] Research Assistant @ Academic SinicaDesign and construct the multi-variable climate downscaling models via machine learning, deep learning methods for precipitation predictions. Create an integrate model for difference climatological simulation models for less computational costs and increasing prediction resolution.Model architecture includes:1. CNN-based (e.g. YNet)2. GAN-based (e.g. CorrGAN)3. Transformer-like (ClimaX, ViT)***[2020/5~2021/6] Chipbond Tech. - Engineer of New Product Introduction at Equipment Dept.Our team was dedicated to increase the capabilities of manufacturing machines and the flows, designs of producing related systems, cooperating with IT, IE and Production Dept. As for equipment dept. itself, we are focusing on increasing the yield rate of packaging of driver-IC. The package test is performed by three components: Handler, Tester and Probe card. By analyzing the manufacturing data, the yield rate issue often relates to Handler and Probe card. One of my jobs is to increase the durability and stability of both by establishing SOP, also the TA (OP) orientation.Job includes:1. New Product Introduction2. Improvement of driver IC packaging equipment3. Introduce/improve new product manufacturing flow4. Equipment maintenance5. Monitor/analyze data of driver IC packaging process6. Establishment/documentation of related SOPs