Avinash Agarwal Email and Phone Number
Avinash Agarwal work email
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Semiconductor Process Engineering: Si and GaAs Process Technology Development, Sustaining, Continuous Improvement, New Tool Qualification and Fab Operations, through hands-on ownership, project and team leadership with 25+ years in the IndustryCore Expertise: Plasma Etch, Ash, Wet Etch and Cleans, Ion Implantation, RTA, PECVD Thin Film Deposition, Process Integration and Defect Reduction. Hands on experience majority of Plasma Etch tools from Applied Materials [DPS, MxP, P5000, Centura], LAM [9400, 9600, 4400, 4520, 490, Alliance, Rainbow] and TEL [SCCM, DRM], SPTS, Trikon; Ashers; Wet Etch and Cleans tools, Axcelis/AMAT Implanters, Steag/Mattson RTA, Alloy/Anneal tracks, PECVD Dielectric deposition tools from Applied Materials and ASM, and entire spectrum of Metrology tools.Statistical Process Control, FMEA and Design of Experiments, Spotfire and JMP
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Sr. Process EngineerQorvo, Inc. Mar 2012 - PresentHillsboro, OrPlasma Etch, Wet Etch and Cleans, Ion Implantation, RTA, CVD process engineering supporting established production processes, continuous improvement, supporting new technology development in GaAs fab. In depth knowledge of complete HBT/pHEMT/BiHEMT/MESFET process technologies, providing hands on 24x7 coverage and execution in a highly dynamic and demanding environment . Extensive experience in process integration and defectivity, and impact of device parameters. Very adept at leading multiple projects and teams, and performing with constantly changing priorities, goals and deadlines with outstanding ownership, planning and execution. -
Plasma Etch Process EngineerMaxim Integrated Products Jan 2009 - Mar 2012BeavertonPlasma etch development and sustaining of various advanced and established Bipolar/CMOS technologies, including all front-end and back-end etches: Si trench, Poly Si gate, Nitride, Oxide, SOG, Metal, ash and cleans, defects reduction and integration. Extensive expertise on multiple generation of etchers from AMAT and LAM. -
Principal EngineerCypress Semiconductor Mar 2008 - Dec 2008Front and back-end etch development - Shallow Trench Isolation, Gate Etch, Local and Back-end Interconnect technology development and engineering, Advanced Process Control (APC) Development, Tool Ownership and Improvements, Integration issues, Defect Reduction, Yield improvement and Cost Reduction. Hands on experience in operations and trouble-shooting of tool issues of advanced multi-generational etchers from leading equipment suppliers (LAM, AMAT), SEM, x-SEM, AFM. -
Sr. Staff EngineerIntel 1994 - 20081. Development and ramp of latest CMOS process technologies at Intel's 300mm Fabs2. Expertise in Cu/low-K dual damascene interconnect technology integration3. Plasma etch Module Ownership [TEL SCCM and DRM] for low-K/Cu dual damascene etches: Via, Etch Stop and Trench etch4. Extensive expertise in thin film deposition by PECVD, low k dielectric integration and PECVD Deposition Equipment5. Multiple new fab start-ups and technology transfers6. Leading operational excellence program in high volume and development environment7. High k gate dielectric and metal electrode technology development and integration at International Sematech for 3 years8. PECVD deposition for dielectric films for back-end ILD, STI fill and SiN passivation
Avinash Agarwal Skills
Avinash Agarwal Education Details
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Materials Science And Engineering -
Metallurgical Engineering
Frequently Asked Questions about Avinash Agarwal
What company does Avinash Agarwal work for?
Avinash Agarwal works for Qorvo, Inc.
What is Avinash Agarwal's role at the current company?
Avinash Agarwal's current role is Sr. Process Engineer at Qorvo.
What is Avinash Agarwal's email address?
Avinash Agarwal's email address is av****@****hoo.com
What schools did Avinash Agarwal attend?
Avinash Agarwal attended University Of Illinois At Urbana-Champaign, Indian Institute Of Technology, Bombay.
What are some of Avinash Agarwal's interests?
Avinash Agarwal has interest in Ted Talks And Hiking.
What skills is Avinash Agarwal known for?
Avinash Agarwal has skills like Thin Films, Design Of Experiments, Process Integration, Cvd, Spc, Semiconductors, Plasma Etch, Metrology, Etching, Semiconductor Industry, Pecvd, Semiconductor Process.
Who are Avinash Agarwal's colleagues?
Avinash Agarwal's colleagues are Huy Tran, Jessie Golden, Trevor Albertus, Phuong Le, Shane Moore, George Dobbs, Nina Wieland.
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Avinash Agarwal
New York City Metropolitan Area3birlasoft.com, yahoo.com, gdbinternational.com4 +140880XXXXX
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Avinash Agarwal
Redmond, Wa4aol.in, oracle.com, live.in, microsoft.com
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