Barry Willms Email & Phone Number

Greater San Diego Area

Front End (synthesis, FV, STA, ECO) Lead for GPU

Greater San Diego Area

Implementation engineer - GPU

Greater San Diego Area

WCDMA/HSPA ASIC Verification

Greater San Diego Area

ASIC / FPGA EDA Consulting Services

Greater San Diego Area

Front to Back End ASIC TapeoutLinux System Build-out and Administrator

Contracted for 1) synthesis and verification of MediaFLO ASIC for QUALCOMM, Inc. - ASIC and FPGA2) synthesis, verification and place/route of wireless ASIC for Mobilepeak Systems, Inc. - ASIC only

Projects worked while at QUALCOMM:- GlobalStar ASICs- Managed the QCAE Design Automation Group (FPGA/ASIC Methodology and Training)- Created and taught Synopsys synthesis internal classes- Digital Cinema ASIC - VHDL coding and verfication- Business Development Projects (Technologies and Ventures Group): a) MDDI (http://www.cdmatech.com/technologies/mddi.jsp) b) MediaFLO (http://www.qualcomm.com/mediaflo) c) In Building Base Stations d) 802.11b/g/a - evaluation, trends and projects

MAE (Merchant ASIC Engineering) Group :: methods, training and application support of Synopsys, DFT, simulation and silicon vendor front-end toolsSGS-Thomson Gate Array :: qualification of gate array technology

Digital Design ReUse Methodology Group - VHDL re-usable models of DSP components for re-targetable and parameterizable DSP productSystem Level Modeling - research into methods and applications of using VHDL and Synopsys DesignWare VHDL TeachingDSP Newsletter Editor

Bsee

Electrical Engineering Technology