Bart Mooyman-Beck Email & Phone Number

Port Townsend, WA, US

Austin, Texas Metropolitan Area

Hillsboro, Oregon, United States

Track multiple project status, roll up information weekly to executive report out. Lead issue resolution, develop project schedules. SOW creation and onboarding of staff and contractors.

Redmond, Washington, United States

Display Program Manager responsible for supporting Microsoft Surface Product Display subsystem development efforts. Role requires driving issues/bugs to resolution, keeping Display development schedules, and providing insight to Display technical and product roadmaps.

Santa Clara County, California, United States

Everett Washinton

Responsible for business success of the $150M Imaging product group. Led creation of the 1-3-5 year product roadmaps accounting for customer needs, returns on investment, and competitive responses. Included PLCM into overall strategic planning. Converted team from waterfall to Agile practices for both SW and HW/ME creating better visibility and.

Beaverton Oregon

Responsible for the development of technologies to support Oscilloscope and adjacent Mil_Gov products. Created 1-3-5 year integrated technology and product roadmaps accounting for return on investment, and competitive responses. Initiated Agile development practices, first into SW and then into ASIC/System developments. -Delivered the technologies required.

Beaverton Oregon

Responsible for day-to-day operation and project development at the Oregon Design Center of 30 developers and support personnel.

Hillsboro Oregon

Responsible for the development and business success of the HPC (High Performance Computing) blade system product line. Accountable for the product planning, budgeting, development, and validation of system hardware and firmware. Identified manufacturing sites, contracts and deployment/support of HPC products in line. Provided primary customer sales.

Hillsboro Oregon

Responsible for overseeing offshore development of Enterprise Server Group products 2000-2002. Responsible for managing Server Chipset physical design team comprising CAD, circuit design and physical integration. The Server Chipset team comprised 60 multi-sited developers. 1996-2000.

Beaverton Oregon

Project Manager for Processor board development, Cache and Memory Bus Controller ASICs. Led team of 12 engineers. Responsible for creating offshore development capability and using these teams in a lighthouse project to demonstrate the feasibility of leveraging external services.

Milpitas California

Process integration engineer responsible for the development and implementation of radiation hardened CMOS processes. Developed 1.5/1.2/1.0 u CMOS process and standard cell libraries supporting these processes. Responsible for creating process from base Silicon up through M1 connect.

United States

Electrical Engineer responsible for developing and validating electrical sub-systems for DOD satellite programs. Developed Analog and Digital sub-systems, and ASICs for multiple satellite programs. After launch, responsible for data collection and analysis of satellite telemetry as well as providing day to day satellite operational commands.