Brian Dipert Email & Phone Number

Golden, Co

Golden, Co

Golden, Co

Sierra Media draws on 25+ years' worth of diverse experience in the high technology arena to assist visionary, trendsetting companies with freelance, contract and full-time projects involving online and print technical writing, product positioning, product evaluations (both standalone and competitive), and other opportunities.

Golden, Co

Golden, Co

Golden, Co

Truckee, Ca

I began my editorial career covering covering programmable logic devices and design software, shortly thereafter expanding to semiconductor memories. From there, I further grew my 'beat' to encompass multimedia devices (audio, 2D/3D graphics, and still/video imaging) and associated code. And for the past five-plus years, my coverage responsibilities further expanded to cover all ICs, subsystems and software associated with the consumer electronics market; PC CPUs and chipsets, µPs, µCs, SoCs and DSPs, mass storage devices, display technologies, sensors of all sorts, internal and external expansion buses, wired and wireless networking technologies, and O/Ss and applications.I was based out of my home throughout my EDN career and relied heavily on telecommuting tools such as the Internet, fax machine, telephone and videoconferencing. The job also involves frequent travel, often to Silicon Valley. Unlike many other journalists, EDN's job responsibilities and reader expectations required that I remained highly technical in my knowledge and skill set, exemplified by frequent hands-on design projects. And I focused my editorial efforts not only on the products themselves but on important associated ecosystem issues; IP licensing, alliances, acquisitions (and spinoffs), lawsuits, government policies and prosecution efforts, foundry capacity and supply chain trends, etc.I was one of the first EDN editors to launch a visible online editorial presence via the Brian's Brain blog, in March of 2005, and over the subsequent six-plus years I consistently published on average more than one post per business day. At its peak, the Brian's Brain blog drew more than 1 million hits per year; I cultivated a commensurately sizable and sustained online community. My online editorial efforts garnered ASBPE National Gold Awards in 2007 and 2008, along with an ASBPE National Bronze award in 2009. I also received a Jesse H. Neal National Gold Award in 2008.

I began my editorial career covering covering programmable logic devices and design software, shortly thereafter expanding to semiconductor memories. From there, I further grew my 'beat' to encompass multimedia devices (audio, 2D/3D graphics, and still/video imaging) and associated code. And for the past five-plus years, my coverage responsibilities further expanded to cover all ICs, subsystems and software associated with the consumer electronics market; PC CPUs and chipsets, µPs, µCs, SoCs and DSPs, mass storage devices, display technologies, sensors of all sorts, internal and external expansion buses, wired and wireless networking technologies, and O/Ss and applications.I was based out of my home throughout my EDN career and relied heavily on telecommuting tools such as the Internet, fax machine, telephone and videoconferencing. The job also involves frequent travel, often to Silicon Valley. Unlike many other journalists, EDN's job responsibilities and reader expectations required that I remained highly technical in my knowledge and skill set, exemplified by frequent hands-on design projects. And I focused my editorial efforts not only on the products themselves but on important associated ecosystem issues; IP licensing, alliances, acquisitions (and spinoffs), lawsuits, government policies and prosecution efforts, foundry capacity and supply chain trends, etc.I was one of the first EDN editors to launch a visible online editorial presence via the Brian's Brain blog, in March of 2005, and over the subsequent six-plus years I consistently published on average more than one post per business day. At its peak, the Brian's Brain blog drew more than 1 million hits per year; I cultivated a commensurately sizable and sustained online community. My online editorial efforts garnered ASBPE National Gold Awards in 2007 and 2008, along with an ASBPE National Bronze award in 2009. I also received a Jesse H. Neal National Gold Award in 2008.

I began my editorial career covering covering programmable logic devices and design software, shortly thereafter expanding to semiconductor memories. From there, I further grew my 'beat' to encompass multimedia devices (audio, 2D/3D graphics, and still/video imaging) and associated code. And for the past five-plus years, my coverage responsibilities further expanded to cover all ICs, subsystems and software associated with the consumer electronics market; PC CPUs and chipsets, µPs, µCs, SoCs and DSPs, mass storage devices, display technologies, sensors of all sorts, internal and external expansion buses, wired and wireless networking technologies, and O/Ss and applications.I was based out of my home throughout my EDN career and relied heavily on telecommuting tools such as the Internet, fax machine, telephone and videoconferencing. The job also involves frequent travel, often to Silicon Valley. Unlike many other journalists, EDN's job responsibilities and reader expectations required that I remained highly technical in my knowledge and skill set, exemplified by frequent hands-on design projects. And I focused my editorial efforts not only on the products themselves but on important associated ecosystem issues; IP licensing, alliances, acquisitions (and spinoffs), lawsuits, government policies and prosecution efforts, foundry capacity and supply chain trends, etc.I was one of the first EDN editors to launch a visible online editorial presence via the Brian's Brain blog, in March of 2005, and over the subsequent six-plus years I consistently published on average more than one post per business day. At its peak, the Brian's Brain blog drew more than 1 million hits per year; I cultivated a commensurately sizable and sustained online community. My online editorial efforts garnered ASBPE National Gold Awards in 2007 and 2008, along with an ASBPE National Bronze award in 2009. I also received a Jesse H. Neal National Gold Award in 2008.

I managed a group responsible for the entire flash memory product line. This organization both created tools and collateral (such as iBIS and Verilog/VHDL models and Windows utilities) and engaged with third-party companies (such as surface mount equipment vendors and PROM programmer manufacturers) to ensure robust industry support at new product and package introduction. I also coordinated activities with those of similar groups in other locations within Intel and championed new methods of tools and collateral distribution such as the World Wide Web. A key part of this job was marketing; increasing awareness of the value of our tool support and packaging leadership with sales force, customer base and worldwide press. I managed a staff of ~15 engineers and technicians.

Chief job functions during this timeframe centered around successful launch of the Intel 28F001BX Boot Block, 28F008SA and 28F016SV FlashFile and 28F016XD and 28F016XS Fast Flash product lines. Datasheet completion required in-depth knowledge of device operation and close coordination with other functional groups. I authored ~20 application notes and engineering reports. Technical papers I wrote have been published in a number of industry publications and at a wide range of conferences. I extensively trained the Intel and distribution sales force, presented to key customers worldwide on hundreds of occasions, and also handled technical briefings with press around the world. Intel submitted eight patent applications relating to my work during this phase of my employment. I managed a staff of 2 to 5 engineers.

During this 4 month project, I was asked to temporarily transition to the design group to help architect the ASICs for the Intel Series 2 flash memory cards. I designed roughly 50% of the circuitry in these two ASICs, and additionally wrote the majority of the fault grading test tapes used by the ASIC manufacturer. Intel submitted three patent application in my name relating to design techniques used in this project. CAD tools included WorkView, and simulation was via Fujitsu's FAME software environment.

I was co-author of 'Designing With Flash Memory' and author of ‘The PCI Bus Handbook’, ‘The Hip-Pocket Guide to MS-DOS 6.22’ and ‘The Hip-Pocket Guide to Microsoft Windows 3.1/3.11’, all published by Annabooks Press.

Responsibilities included full technical hotline support and technical documentation creation/revision for Intel's EPROM product line. Software responsibilities included code and hardware creation/revision to add 33 products to those supported by Intel's PROM programmers. I received technical responsibility for Intel's microcontroller peripheral product, provided tools and training to the field sales force and customer base, and coordinated product relaunch in the market with direct mailings and promotional material.