Hardware Development Manager of a team responsible for Accelerated and Trusted Security (TS) servers used in the AWS fleet, from concept through end of life. • Accelerated designs include multi GPU/Accelerator card designs, either as unibody chassis or multi JBOG devices, depending on intended workload and power requirements.• Trusted Security designs include cryptography devices and secure enclaves for processing and storing sensitive data, eg: credit card processing for Amazon.com• Experience with AMD, Intel, ARM CPU’s & NVIDIA, AMD, Marvel, Xilinx (FPGA) and custom AWS designed accelerated silicon• Expertise in System Design, CPU Architecture, PCIe, thermal and rack sizing • Responsible for all phases of design, from developing product requirements with internal and external customers, creating design concepts, tracking design progress with design partners, delivering racks and launch• Responsible for lifespan of hardware in the AWS fleet including creating KPI’s for operation, monitoring dashboards, identifying faults affecting customers, root cause and delivery of improvements and fixes. • Responsible for continuity of supply for the lifespan of the server, monitoring supply chain for potential gaps and creating second source designs to prevent supply interruptions. Includes creating ODM selection model to ensure a healthy ecosystem of ODM’s ready to design AWS’s most complicated platforms.

As the Fleet Quality Manager for AWS I was responsible for identification, root cause and elimination of all hardware faults across the entire AWS fleet. • Responsible for creating and tracking metrics to gauge the health of the AWS fleet• Focused on automated systems to triage hosts at scale• Responsible for creation of automated testing environment to leverage custom and 3rd party content to stress test faulty hardware and identify failing components• Responsible for creation of system to detect non-fatal errors in the fleet causing performance failures.• Responsible for building a team with deep dive experience in multiple architectural disciplines (memory, DDR, PCIe, High Speed links, power distribution, server cooling, FW)

Technical lead responsible for defining and growing a DevOps team within AWS’s Hardware Engineering org with a mission to identify, root cause and eliminate all systemic hardware failures from the fleet. Responsibilities ranged from implementing DFx hooks across new and existing hardware in the fleet, developing innovative telemetry solutions that can operate on millions of devices, ingesting and modifying vendor and/or industry standard debug tools to work in the AWS environment and mentoring new team members to create a quality focused culture.

• Team lead for 6 engineers responsible for integration validation of Platform management silicon & firmware on Xeon servers. Power Management & Performance workloads.• Specializing in power management and performance tuning and workloads.• Architecture, design and implementation of test automation tools to augment the capabilities of the team.• Frequent customer interaction for triage and product development.

Responsible for multiple validation disciplines on Intel Xeon chipsets and server platforms. Specifically running system & synthetic content to cover corner case usage models and compatibility content to prepare platforms for real world scenarios.