Software Engineer
Current-Developed and productized ML-based chip design segmentation algorithms to suppress wafer noise and increase tool defect sensitivity.-Designed and implemented a high-performance domain specific language to transform chip design geometry during wafer inspection.-Optimized distributed computational geometry application to reduce resource usage, enabling leading-node use cases.-Designed architecture for a systemwide noise control solution spanning multiple software applications and platform types.-Developed algorithms to intelligently consolidate chip design geometry to improve inspection performance while maintaining defect sensitivity.-Debugged difficult system-level software problems and built numerous features to improve reliability for applications running in the fab.