Sr Asic Design Engineer
Current- Responsible for the Tegra SoC MC micro-architecture and design including RTL design, synthesis, functional verification, and timing analysis using leading-edge CAD tools and using the latest process technologies.- Support post-silicon validation activities working with Silicon characterization and Software teams.- Collaborate and coordinate with architects, other designers, pre- and post-silicon verification teams, synthesis, timing, and back-end teams to accomplish tasks.