Bert Kyle Email & Phone Number

Durham, North Carolina, United States

• Lead developer for custom FPGA place & route software which was used to develop products ranging from touch screen displays to radiation hardened aerospace and military hardware.• Wrote quadratic placer which solves a system of linear equations to find a quick estimate of gate placement. Solution improved run-time for customers saving days on large designs.• Developed detailed placer using simulated annealing, a statistical model to converge on a near optimal placement of gates. The solution improved the speed of the chip and routability.• Designed and implemented a 3D capacitance and resistance solver. Improved estimation for timing frequency of chip. Performance critical in calculations for over 1 million wires.• Accelerated the chip design life cycle for customer base by developing and coding a software feature (hierarchical place and route) that allowed reusing portions of legacy designs into a new chip.

Durham, North Carolina, United States

• Responsible for main polygon commands used to verify the manufacturability of a design on any process technology. Polygon Commands: Size, Layout Drawn Check, Layout Grid Check, and Self-Intersect. Physical verification checks were used at the world’s largest manufacturing facilities.• Developed preprocessing functionality in a distributed processor model resulting in 30% faster runtime.• Increased performance by 30X through major enhancements to polygon sizing algorithm. Solution improved the consistency of the results across different distributed processing scenarios.• Resolved critical issue for Intel Corporation by coding a “Size Outside” algorithm in two days. Improved performance runtime of DRC (Design Rule Check) engine by several orders of magnitude. Intel’s chip was subsequently delivered on schedule. • Improved performance of Hercules product by 7%, and most widely used function, polygon tessellation by 40%. Performance improvements were superior to previous attempts by other top developers.

Chapel Hill, Nc

• First employee hired at start-up firm to develop custom place and route software for electronic chips (structured ASICs) with one configurable routing layer. Reusable approach saved customers millions of dollars in design costs.• Invented, designed and implemented several specialized routing algorithms under aggressive timeline to provide market-ready software.

• Responsible for server performance testing metrics on Clarion (storage device) product. • Coded and supported developer test software written in C. • Offered full-time position at project completion.