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Areas of Expertise: Engineering Management; Analog Mixed-signal Methodology, Micro-architecture, and Verification; CMOS VLSI and Analog Mixed-signal Circuit Design; Capacitive Touch Sensing and Integrated Touch & LCD Display Controller (TDDI) architectures.Director/Architect with 35+ tapeouts of analog/digital mixed-signal CMOS IC Design experience, directly responsible for the design and MP of over a billion units. Experienced in complete product lifecycle, from initial conception through design, verification, fabrication & testing. Driven by project success and the success of the team.
Betasoft Consulting Inc.
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PresidentBetasoft Consulting Inc. Feb 2019 - PresentYou need custom silicon to be competitive in the marketplace. Have you been searching for a silicon expert you can trust to integrate your product into a chip? Do bugs before tapeout keep you up at night? Do you wish you had the time and expertise to set up a good mixed signal verification methodology that can help your team quickly implement new functionality with first silicon success? Do first silicon bugs set back your product development schedule? Do silicon revisions and ECOs wreak havoc with your budget and customer deliverables? Most electronic design leaders struggle with these same questions. You are not alone and we are here to help.Our Services: System Silicon Architecture, Custom Silicon Development, Silicon Project Planning and Management, Analog Mixed-signal Methodology & Verification, IP & Expert Witness Consulting.
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Director, Analog & Mixed Signal System & VerificationSynaptics Jan 2015 - Nov 2018San Jose, California, UsResponsible for a global team that performs AMS verification of complex capacitive Touch controllers, as well as integrated Touch and LCD Display Controllers (TDDI). Technical lead for various TDDI controller chips that have shipped millions of units. Worked with System Architects, Digital, Test, and Firmware teams to define complex interface specifications for analog touch and display control logic, and analog DFT. Worked closely with Apps, Firmware, and Test teams in NPI/MP of Touch and TDDI controllers. Provide technical support to field teams with RMA, and failure analysis investigations (DOE). -
Principal Silicon Architect, TouchSynaptics Sep 2011 - Jan 2015San Jose, California, UsSilicon development technical lead for Touchscreen CMOS controllers for mobile, tablet, and notebook PC applications. Oversee the technical aspects of silicon project definition and execution combining broad technical skills, technical lead skills and people skills to oversee a talented interdisciplinary design team. Also interact with internal departments such as Strategic Marketing and Business Units as well as external customers to help shape Synaptics’ future core technologies.
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System Silicon Design ManagerSynaptics Aug 2005 - Sep 2011San Jose, California, UsManaged the Digital and Mixed-signal CMOS design team that develops all current low-power, low-cost capacitive sensing ASICs for human interface applications (e.g., TouchPad and TouchScreens). Responsible for Design Quality, Cost and Schedules, Resource Allocation. Collaborate closely with Verification, Layout, and Test teams, and defined standards and procedures for development methodology, debug/verification, failure analysis, CAD tool selection/evaluation. Interfaced with Marketing, Systems Engineering, Applications, Software, and other internal customers to help define product requirements. Developed specifications for advanced mixed-signal capacitive sensing ASICs, including silicon roadmap (new project definition, MRD/PRD), technology scoping and feasibility (technical risks, as well as make vs. buy decisions). Performed in-house training for FAEs, managed external customer requests from the field.Grew the team from four people up to 10 full-time designers. Managed contractors (NDA, negotiated and wrote contracts, managed progress, deliverables review). Negotiated with third-party IP vendors as well as silicon foundries. Managed (functional and/or project) every significant silicon development over the last 5 years deployed in the majority of the current products.Silicon group representative to the IP committee, 1 patent issued.
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Senior Analog DesignerSynaptics Aug 2003 - Aug 2005San Jose, California, UsDesigned analog circuits for low-power, low-cost capacitive and resistive sensing ASICs. Developed specifications for advanced mixed-signal capacitive sensing ASICs. Designed low-power oscillators and interfaced with layout contractor for post-layout verification. Technical lead responsible for project management; supervised and mentored junior designers and layout/mask design contractors
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Senior Analog Design ContractorSynaptics Mar 2002 - Aug 2003San Jose, California, UsDesigned analog circuits for low-power, low-cost capacitive and resistive sensing ASICs. Designed low-power oscillators and interfaced with layout contractor for post-layout verification.
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Senior Mixed-Signal Design EngineerInnovative Semiconductors, Inc Jul 1999 - Oct 2001USB 2.0: Designed 480Mb/s analog transceivers for USB 2.0 including cable driver, receiver, squelch detector, and clock recovery DLL in TSMC's 0.25um and 0.18um CMOS processes. Wrote specifications for 480MHz PLL clock synthesizer and interfaced with PLL design contractor for post-layout verification and performance characterization. Supervised two junior analog designers and layout/mask design contractor.IEEE-1394: Performed analog verification of 400Mb/s serial transceiver PHY using Mentor's Accusim simulator. Developed scripts in AMPLE to automate analog verification (PVT). Assisted with DRC and LVS of 1394 PHY chip in TSMC's 0.35um CMOS. Bench-tested, troubleshooted, and characterized 1394 PHY. Assisted with porting of IEEE-1394 PHY to UMC's 0.18um CMOS.
Rafael Betancourt Skills
Rafael Betancourt Education Details
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Stanford UniversityElectrical Engineering -
University Of Puerto Rico - Mayaguez CampusElectrical Engineering
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University Of Southern CaliforniaElectrical Engineering
Frequently Asked Questions about Rafael Betancourt
What company does Rafael Betancourt work for?
Rafael Betancourt works for Betasoft Consulting Inc.
What is Rafael Betancourt's role at the current company?
Rafael Betancourt's current role is Betasoft Consulting Inc | Working Silicon – First Time, Every Time..
What is Rafael Betancourt's email address?
Rafael Betancourt's email address is ra****@****ics.com
What is Rafael Betancourt's direct phone number?
Rafael Betancourt's direct phone number is +140890*****
What schools did Rafael Betancourt attend?
Rafael Betancourt attended Stanford University, University Of Puerto Rico - Mayaguez Campus, University Of Southern California.
What are some of Rafael Betancourt's interests?
Rafael Betancourt has interest in Children, Intellectual Property, Health, Education, Disruptive Innovation, Analog And Mixed Signal Cmos Design, Science And Technology, Human Rights, Mixed Signal Verification Methodologies.
What skills is Rafael Betancourt known for?
Rafael Betancourt has skills like Verilog, Analog Circuit Design, Engineering Management, Hardware Architecture, Cad, Spice, Artists, Cadence Spectre, Verilog Ams, Mixed Signal, Integrated Circuit Design, Cmos.
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